BPI/BPI-CM9-Linux
6
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
Files
main
BPI-CM9-Linux/build/patch/kernel/archive/sm8550-6.18/0052-gpu-panel-add-Pocket-DMG-panel-driver.patch
T

702 lines
26 KiB
Diff
Raw Permalink Blame History

From 1f6b8b9a7112f1c1c50a6e0cc744c92e16da80ea Mon Sep 17 00:00:00 2001
From: Philippe Simons <[email protected]>
Date: Sun, 3 Aug 2025 14:24:50 +0200
Subject: [PATCH] gpu: panel: add Pocket DMG panel driver
---
drivers/gpu/drm/panel/Kconfig | 10 +
drivers/gpu/drm/panel/Makefile | 1 +
drivers/gpu/drm/panel/panel-ar02-3inch.c | 647 +++++++++++++++++++++++
3 files changed, 658 insertions(+)
create mode 100644 drivers/gpu/drm/panel/panel-ar02-3inch.c
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 2b0c4bab517c..86f3c0178805 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -27,6 +27,16 @@ config DRM_PANEL_AR06_4INCH
Say Y here if you want to enable support for Ayaneo Pocket ACE
1080x1620 60hz Panel.
+config DRM_PANEL_AR02_3INCH
+ tristate "Ayaneo Pocket DMG panel driver"
+ depends on OF
+ depends on DRM_MIPI_DSI
+ depends on BACKLIGHT_CLASS_DEVICE
+ select DRM_DISPLAY_HELPER
+ help
+ Say Y here if you want to enable support for Ayaneo Pocket DMG
+ 1080x1240 60hz Panel.
+
config DRM_PANEL_ARM_VERSATILE
tristate "ARM Versatile panel driver"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index e2e83723083e..630f5f22e40f 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_DRM_PANEL_ABT_Y030XX067A) += panel-abt-y030xx067a.o
obj-$(CONFIG_DRM_PANEL_AR06_4INCH) += panel-ar06-4inch.o
+obj-$(CONFIG_DRM_PANEL_AR02_3INCH) += panel-ar02-3inch.o
obj-$(CONFIG_DRM_PANEL_ARM_VERSATILE) += panel-arm-versatile.o
obj-$(CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596) += panel-asus-z00t-tm5p5-n35596.o
obj-$(CONFIG_DRM_PANEL_AUO_A030JTN01) += panel-auo-a030jtn01.o
diff --git a/drivers/gpu/drm/panel/panel-ar02-3inch.c b/drivers/gpu/drm/panel/panel-ar02-3inch.c
new file mode 100644
index 000000000000..67151480f1aa
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-ar02-3inch.c
@@ -0,0 +1,647 @@
+// SPDX-License-Identifier: GPL-2.0-only
+// Copyright (c) 2025 FIXME
+// Generated with linux-mdss-dsi-panel-driver-generator from vendor device tree:
+// Copyright (c) 2013, The Linux Foundation. All rights reserved. (FIXME)
+
+#include <linux/backlight.h>
+#include <linux/delay.h>
+#include <linux/gpio/consumer.h>
+#include <linux/mod_devicetable.h>
+#include <linux/module.h>
+
+#include <drm/drm_mipi_dsi.h>
+#include <drm/drm_modes.h>
+#include <drm/drm_panel.h>
+#include <drm/drm_probe_helper.h>
+
+struct ar02_3inch {
+ struct drm_panel panel;
+ struct mipi_dsi_device *dsi;
+ struct gpio_desc *reset_gpio;
+ struct regulator_bulk_data *supplies;
+ enum drm_panel_orientation orientation;
+};
+
+static const struct regulator_bulk_data panel_supplies[] = {
+ { .supply = "avdd" },
+ { .supply = "vci" },
+ { .supply = "vddio" },
+};
+
+static inline struct ar02_3inch *to_ar02_3inch(struct drm_panel *panel)
+{
+ return container_of(panel, struct ar02_3inch, panel);
+}
+
+static void ar02_3inch_reset(struct ar02_3inch *ctx)
+{
+ gpiod_set_value_cansleep(ctx->reset_gpio, 0);
+ usleep_range(10000, 11000);
+ gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+ usleep_range(10000, 11000);
+ gpiod_set_value_cansleep(ctx->reset_gpio, 0);
+ msleep(55);
+}
+
+static int ar02_3inch_on(struct ar02_3inch *ctx)
+{
+ struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };
+
+ ctx->dsi->mode_flags |= MIPI_DSI_MODE_LPM;
+
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x35, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x53, 0x20);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x51, 0x03, 0xff);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x02);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xaa, 0x10);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0,
+ 0x01, 0x36, 0x87, 0x00, 0x87);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb1,
+ 0x01, 0x2d, 0x00, 0x0e, 0x00, 0x0e, 0x01);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb2,
+ 0x01, 0x2d, 0x00, 0x0e, 0x00, 0x0e, 0x01);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb6, 0x40);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb7, 0x84);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbd, 0x01);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc1, 0x00, 0x05, 0x00, 0x05);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc3, 0x11, 0x55);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc5, 0x10);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xcf, 0x0b, 0x0e, 0x0b, 0x1f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd0,
+ 0x80, 0x13, 0x50, 0x14, 0x14, 0x00, 0x29,
+ 0x2d, 0x19, 0x00, 0x00, 0x00, 0x2d, 0x19,
+ 0x33, 0x00, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc0, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xaa, 0x12);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb1, 0x33);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb5, 0xa7, 0xa7);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb6, 0xd7, 0xd7);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb7, 0x30, 0x30);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb8, 0x20, 0x20);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb9, 0x38, 0x37, 0x37);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xba, 0x38, 0x1b);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd2,
+ 0x0f, 0x00, 0x00, 0x02, 0x04, 0x02, 0x04,
+ 0x06, 0x00, 0x00, 0x02, 0x02, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc4, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc7, 0x00, 0x54, 0xa5, 0x02);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xcf, 0x03, 0x28, 0x00, 0x11);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xaa, 0x11);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc2,
+ 0x10, 0x00, 0x60, 0x02, 0x11, 0x12, 0x13,
+ 0x14, 0x15, 0x16);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc3,
+ 0x00, 0x00, 0x00, 0x08, 0x00, 0xaa, 0x01,
+ 0xff, 0x02, 0xff, 0x03, 0xff);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc4,
+ 0x00, 0x0a, 0x00, 0x0a, 0x00, 0x0a, 0x00,
+ 0x0a, 0x00, 0x0a, 0x00, 0x0a, 0x00, 0x0a,
+ 0x00, 0x0a, 0x00, 0x0a, 0x80, 0x28, 0x80,
+ 0x28);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xaa, 0x13);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbf, 0x05);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0,
+ 0x00, 0x00, 0x01, 0x09, 0x01, 0x41, 0x01,
+ 0x5f, 0x01, 0x74, 0x01, 0x93, 0x01, 0xa9,
+ 0x01, 0xbb);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb1,
+ 0x01, 0xca, 0x01, 0xda, 0x01, 0xea, 0x01,
+ 0xf9, 0x02, 0x08, 0x02, 0x22, 0x02, 0x3b,
+ 0x02, 0x51);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb2,
+ 0x02, 0x65, 0x02, 0x7a, 0x02, 0x9e, 0x02,
+ 0xc0, 0x02, 0xdd, 0x03, 0x1a, 0x03, 0x4e,
+ 0x03, 0x85);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb3, 0x03, 0xbd);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb4,
+ 0x00, 0x00, 0x00, 0xf9, 0x01, 0x30, 0x01,
+ 0x4e, 0x01, 0x63, 0x01, 0x81, 0x01, 0x97,
+ 0x01, 0xa9);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb5,
+ 0x01, 0xb8, 0x01, 0xc8, 0x01, 0xd7, 0x01,
+ 0xe6, 0x01, 0xf4, 0x02, 0x0e, 0x02, 0x26,
+ 0x02, 0x3c);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb6,
+ 0x02, 0x50, 0x02, 0x63, 0x02, 0x87, 0x02,
+ 0xa8, 0x02, 0xc7, 0x02, 0xff, 0x03, 0x36,
+ 0x03, 0x69);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb7, 0x03, 0x9b);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb8,
+ 0x00, 0x00, 0x01, 0x51, 0x01, 0x84, 0x01,
+ 0x9e, 0x01, 0xb0, 0x01, 0xc9, 0x01, 0xdc,
+ 0x01, 0xea);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb9,
+ 0x01, 0xf6, 0x02, 0x01, 0x02, 0x0e, 0x02,
+ 0x1b, 0x02, 0x2a, 0x02, 0x44, 0x02, 0x5e,
+ 0x02, 0x76);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xba,
+ 0x02, 0x8b, 0x02, 0xa0, 0x02, 0xc6, 0x02,
+ 0xe9, 0x03, 0x07, 0x03, 0x44, 0x03, 0x7e,
+ 0x03, 0xb5);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbb, 0x03, 0xec);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbf, 0x04);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0,
+ 0x00, 0x00, 0x01, 0x02, 0x01, 0x37, 0x01,
+ 0x53, 0x01, 0x67, 0x01, 0x83, 0x01, 0x98,
+ 0x01, 0xa9);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb1,
+ 0x01, 0xb7, 0x01, 0xc7, 0x01, 0xd4, 0x01,
+ 0xe1, 0x01, 0xef, 0x02, 0x0a, 0x02, 0x21,
+ 0x02, 0x38);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb2,
+ 0x02, 0x4b, 0x02, 0x5e, 0x02, 0x80, 0x02,
+ 0xa0, 0x02, 0xbb, 0x02, 0xf2, 0x03, 0x23,
+ 0x03, 0x52);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb3, 0x03, 0x82);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb4,
+ 0x00, 0x00, 0x00, 0xe9, 0x01, 0x1f, 0x01,
+ 0x3c, 0x01, 0x51, 0x01, 0x6f, 0x01, 0x85,
+ 0x01, 0x97);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb5,
+ 0x01, 0xa6, 0x01, 0xb5, 0x01, 0xc3, 0x01,
+ 0xd1, 0x01, 0xde, 0x01, 0xf8, 0x02, 0x0e,
+ 0x02, 0x24);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb6,
+ 0x02, 0x37, 0x02, 0x4a, 0x02, 0x6b, 0x02,
+ 0x8c, 0x02, 0xa6, 0x02, 0xdb, 0x03, 0x0b,
+ 0x03, 0x39);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb7, 0x03, 0x67);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb8,
+ 0x00, 0x00, 0x01, 0x38, 0x01, 0x6d, 0x01,
+ 0x88, 0x01, 0x9b, 0x01, 0xb7, 0x01, 0xca,
+ 0x01, 0xda);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb9,
+ 0x01, 0xe7, 0x01, 0xf4, 0x01, 0xfe, 0x02,
+ 0x09, 0x02, 0x13, 0x02, 0x2d, 0x02, 0x44,
+ 0x02, 0x5c);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xba,
+ 0x02, 0x70, 0x02, 0x85, 0x02, 0xa8, 0x02,
+ 0xc9, 0x02, 0xe4, 0x03, 0x1d, 0x03, 0x52,
+ 0x03, 0x83);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbb, 0x03, 0xb2);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbf, 0x03);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0,
+ 0x00, 0x00, 0x00, 0xd3, 0x01, 0x0c, 0x01,
+ 0x2c, 0x01, 0x43, 0x01, 0x64, 0x01, 0x7d,
+ 0x01, 0x92);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb1,
+ 0x01, 0xa3, 0x01, 0xb2, 0x01, 0xc0, 0x01,
+ 0xce, 0x01, 0xda, 0x01, 0xf2, 0x02, 0x09,
+ 0x02, 0x1d);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb2,
+ 0x02, 0x30, 0x02, 0x42, 0x02, 0x62, 0x02,
+ 0x80, 0x02, 0x9b, 0x02, 0xcb, 0x02, 0xf9,
+ 0x03, 0x23);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb3, 0x03, 0x4d);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb4,
+ 0x00, 0x00, 0x00, 0xc4, 0x00, 0xfc, 0x01,
+ 0x1c, 0x01, 0x32, 0x01, 0x54, 0x01, 0x6d,
+ 0x01, 0x81);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb5,
+ 0x01, 0x92, 0x01, 0xa1, 0x01, 0xae, 0x01,
+ 0xbc, 0x01, 0xc9, 0x01, 0xe0, 0x01, 0xf6,
+ 0x02, 0x0a);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb6,
+ 0x02, 0x1d, 0x02, 0x2f, 0x02, 0x4e, 0x02,
+ 0x6b, 0x02, 0x85, 0x02, 0xb6, 0x02, 0xe2,
+ 0x03, 0x0b);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb7, 0x03, 0x33);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb8,
+ 0x00, 0x00, 0x01, 0x08, 0x01, 0x43, 0x01,
+ 0x62, 0x01, 0x79, 0x01, 0x9a, 0x01, 0xb2,
+ 0x01, 0xc5);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb9,
+ 0x01, 0xd5, 0x01, 0xe3, 0x01, 0xef, 0x01,
+ 0xf9, 0x02, 0x02, 0x02, 0x16, 0x02, 0x2c,
+ 0x02, 0x40);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xba,
+ 0x02, 0x54, 0x02, 0x67, 0x02, 0x89, 0x02,
+ 0xa8, 0x02, 0xc4, 0x02, 0xf5, 0x03, 0x27,
+ 0x03, 0x52);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbb, 0x03, 0x7b);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbf, 0x02);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0,
+ 0x00, 0x00, 0x00, 0x9d, 0x00, 0xd3, 0x00,
+ 0xf2, 0x01, 0x09, 0x01, 0x2b, 0x01, 0x45,
+ 0x01, 0x5a);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb1,
+ 0x01, 0x6d, 0x01, 0x7d, 0x01, 0x8b, 0x01,
+ 0x98, 0x01, 0xa4, 0x01, 0xb8, 0x01, 0xcb,
+ 0x01, 0xdc);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb2,
+ 0x01, 0xed, 0x01, 0xfc, 0x02, 0x19, 0x02,
+ 0x32, 0x02, 0x48, 0x02, 0x71, 0x02, 0x96,
+ 0x02, 0xb6);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb3, 0x02, 0xd5);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb4,
+ 0x00, 0x00, 0x00, 0x9c, 0x00, 0xcf, 0x00,
+ 0xec, 0x01, 0x01, 0x01, 0x21, 0x01, 0x39,
+ 0x01, 0x4c);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb5,
+ 0x01, 0x5d, 0x01, 0x6c, 0x01, 0x79, 0x01,
+ 0x85, 0x01, 0x90, 0x01, 0xa4, 0x01, 0xb7,
+ 0x01, 0xc9);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb6,
+ 0x01, 0xda, 0x01, 0xe8, 0x02, 0x04, 0x02,
+ 0x1d, 0x02, 0x33, 0x02, 0x5b, 0x02, 0x80,
+ 0x02, 0xa0);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb7, 0x02, 0xbe);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb8,
+ 0x00, 0x00, 0x00, 0xd0, 0x01, 0x09, 0x01,
+ 0x28, 0x01, 0x3f, 0x01, 0x60, 0x01, 0x79,
+ 0x01, 0x8e);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb9,
+ 0x01, 0x9f, 0x01, 0xae, 0x01, 0xbb, 0x01,
+ 0xc7, 0x01, 0xd2, 0x01, 0xe4, 0x01, 0xf2,
+ 0x02, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xba,
+ 0x02, 0x0e, 0x02, 0x1d, 0x02, 0x3b, 0x02,
+ 0x55, 0x02, 0x6d, 0x02, 0x98, 0x02, 0xbe,
+ 0x02, 0xe0);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbb, 0x02, 0xff);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbf, 0x01);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0,
+ 0x00, 0x00, 0x00, 0x6e, 0x00, 0x96, 0x00,
+ 0xad, 0x00, 0xbe, 0x00, 0xd9, 0x00, 0xec,
+ 0x00, 0xfd);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb1,
+ 0x01, 0x0b, 0x01, 0x17, 0x01, 0x22, 0x01,
+ 0x2d, 0x01, 0x36, 0x01, 0x47, 0x01, 0x56,
+ 0x01, 0x63);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb2,
+ 0x01, 0x6f, 0x01, 0x7b, 0x01, 0x8f, 0x01,
+ 0xa1, 0x01, 0xb1, 0x01, 0xce, 0x01, 0xe9,
+ 0x01, 0xff);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb3, 0x02, 0x14);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb4,
+ 0x00, 0x00, 0x00, 0x62, 0x00, 0x87, 0x00,
+ 0x9e, 0x00, 0xae, 0x00, 0xc7, 0x00, 0xdb,
+ 0x00, 0xeb);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb5,
+ 0x00, 0xf8, 0x01, 0x04, 0x01, 0x0f, 0x01,
+ 0x19, 0x01, 0x23, 0x01, 0x33, 0x01, 0x42,
+ 0x01, 0x4f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb6,
+ 0x01, 0x5b, 0x01, 0x67, 0x01, 0x7b, 0x01,
+ 0x8d, 0x01, 0x9e, 0x01, 0xbb, 0x01, 0xd5,
+ 0x01, 0xec);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb7, 0x02, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb8,
+ 0x00, 0x00, 0x00, 0x8b, 0x00, 0xb9, 0x00,
+ 0xd2, 0x00, 0xe5, 0x01, 0x01, 0x01, 0x16,
+ 0x01, 0x27);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb9,
+ 0x01, 0x36, 0x01, 0x43, 0x01, 0x4f, 0x01,
+ 0x59, 0x01, 0x63, 0x01, 0x74, 0x01, 0x83,
+ 0x01, 0x91);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xba,
+ 0x01, 0x9d, 0x01, 0xa9, 0x01, 0xbd, 0x01,
+ 0xcf, 0x01, 0xde, 0x01, 0xf5, 0x02, 0x0a,
+ 0x02, 0x21);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbb, 0x02, 0x36);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbf, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb1,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb2,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb3, 0x00, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb4,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb5,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb6,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb7, 0x00, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb8,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb9,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xba,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbb, 0x00, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd2, 0x14, 0x92, 0x24);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc3,
+ 0x00, 0x23, 0x61, 0x45, 0x21, 0x43, 0x65);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd4, 0x00, 0xff);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd5,
+ 0x00, 0x0c, 0x00, 0x1c, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd6, 0x02);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xaa, 0x14);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb2, 0x03, 0x33);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb4, 0x04, 0x11, 0x11, 0x07);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb5,
+ 0x00, 0x6d, 0x6d, 0x06, 0x01);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb9, 0x00, 0x00, 0x08, 0x32);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbc,
+ 0x10, 0x00, 0x00, 0x06, 0x11, 0x30, 0x88);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbe,
+ 0x10, 0x10, 0x00, 0x08, 0x22, 0x30, 0x86);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xaa, 0x15);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb1, 0x33, 0x41);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb2, 0x63);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb3, 0x84, 0x23, 0x30);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb4, 0x83, 0x04);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb5, 0x83, 0x04);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb6, 0x83, 0x00, 0x04);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb7, 0x83, 0x00, 0x04);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbc, 0x72);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbd, 0x48);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbe,
+ 0x11, 0x00, 0x00, 0x22, 0x00, 0x11, 0x00,
+ 0x00, 0x00, 0x00, 0x01);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbf, 0x02);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc0, 0x02);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc1, 0x02);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc3, 0x01);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xaa, 0x16);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x25, 0x21, 0x20, 0x0b);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb1, 0x0a, 0x04, 0x13, 0x12);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb2, 0x25, 0x25, 0x25, 0x25);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb3, 0x25, 0x25, 0x25, 0x25);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb4, 0x25, 0x25, 0x25, 0x25);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb5, 0x25, 0x25, 0x25, 0x25);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb6, 0x25, 0x25, 0x25, 0x25);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb7, 0x25, 0x25, 0x25, 0x25);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb8, 0x12, 0x13, 0x00, 0x0a);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb9, 0x0b, 0x20, 0x21, 0x25);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xaa, 0x17);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0,
+ 0x02, 0x30, 0x00, 0x09, 0x00, 0x00, 0x00,
+ 0x00, 0x0f, 0xdc, 0xc0, 0x0d, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb1,
+ 0x0c, 0xe0, 0xff, 0x1f, 0xfc, 0x00, 0x20,
+ 0x20, 0x00, 0x20, 0x20, 0x00, 0x20, 0x20,
+ 0x00, 0x20);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb2,
+ 0x00, 0x00, 0x04, 0x00, 0x80, 0xc0, 0x80,
+ 0x00, 0x14, 0x14, 0x00, 0x14, 0x14, 0x00,
+ 0x14, 0x14);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb3,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x40, 0x00, 0xc0, 0x40, 0x0d, 0x40,
+ 0xa0, 0xc0);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb4,
+ 0x67, 0x67, 0x67, 0x67, 0x67, 0x67, 0x3f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb5,
+ 0x23, 0x61, 0x45, 0x12, 0x53, 0x64);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe5, 0x11);
+ mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
+ mipi_dsi_msleep(&dsi_ctx, 200);
+ mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
+ mipi_dsi_msleep(&dsi_ctx, 120);
+
+ return dsi_ctx.accum_err;
+}
+
+static int ar02_3inch_off(struct ar02_3inch *ctx)
+{
+ struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };
+
+ ctx->dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
+
+ mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx);
+ mipi_dsi_msleep(&dsi_ctx, 120);
+ mipi_dsi_dcs_set_display_off_multi(&dsi_ctx);
+ mipi_dsi_usleep_range(&dsi_ctx, 10000, 11000);
+
+ return dsi_ctx.accum_err;
+}
+
+static int ar02_3inch_prepare(struct drm_panel *panel)
+{
+ struct ar02_3inch *ctx = to_ar02_3inch(panel);
+ struct device *dev = &ctx->dsi->dev;
+ int ret;
+
+ ret = regulator_bulk_enable(ARRAY_SIZE(panel_supplies), ctx->supplies);
+ if (ret < 0) {
+ dev_err(panel->dev, "failed to enable regulators: %d\n", ret);
+ return ret;
+ }
+ msleep(20);
+
+ ar02_3inch_reset(ctx);
+
+ ret = ar02_3inch_on(ctx);
+ if (ret < 0) {
+ dev_err(dev, "Failed to initialize panel: %d\n", ret);
+ regulator_bulk_disable(ARRAY_SIZE(panel_supplies), ctx->supplies);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int ar02_3inch_unprepare(struct drm_panel *panel)
+{
+ struct ar02_3inch *ctx = to_ar02_3inch(panel);
+ struct device *dev = &ctx->dsi->dev;
+ int ret;
+
+ ret = ar02_3inch_off(ctx);
+ if (ret < 0)
+ dev_err(dev, "Failed to un-initialize panel: %d\n", ret);
+
+ regulator_bulk_disable(ARRAY_SIZE(panel_supplies), ctx->supplies);
+ gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+
+ return 0;
+}
+
+static const struct drm_display_mode ar02_3inch_mode = {
+ .clock = (1080 + 28 + 4 + 36) * (1240 + 18 + 4 + 8) * 60 / 1000,
+ .hdisplay = 1080,
+ .hsync_start = 1080 + 28,
+ .hsync_end = 1080 + 28 + 4,
+ .htotal = 1080 + 28 + 4 + 36,
+ .vdisplay = 1240,
+ .vsync_start = 1240 + 18,
+ .vsync_end = 1240 + 18 + 4,
+ .vtotal = 1240 + 18 + 4 + 8,
+ .width_mm = 0,
+ .height_mm = 0,
+ .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
+};
+
+static int ar02_3inch_get_modes(struct drm_panel *panel,
+ struct drm_connector *connector)
+{
+ return drm_connector_helper_get_modes_fixed(connector, &ar02_3inch_mode);
+}
+
+static enum drm_panel_orientation ar02_3inch_get_orientation(struct drm_panel *panel)
+{
+ struct ar02_3inch *ctx = to_ar02_3inch(panel);
+
+ return ctx->orientation;
+}
+
+static const struct drm_panel_funcs ar02_3inch_panel_funcs = {
+ .prepare = ar02_3inch_prepare,
+ .unprepare = ar02_3inch_unprepare,
+ .get_modes = ar02_3inch_get_modes,
+ .get_orientation = ar02_3inch_get_orientation,
+};
+
+static int ar02_3inch_bl_update_status(struct backlight_device *bl)
+{
+ struct mipi_dsi_device *dsi = bl_get_data(bl);
+ u16 brightness = backlight_get_brightness(bl);
+ int ret;
+
+ dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
+
+ ret = mipi_dsi_dcs_set_display_brightness_large(dsi, brightness);
+ if (ret < 0)
+ return ret;
+
+ dsi->mode_flags |= MIPI_DSI_MODE_LPM;
+
+ return 0;
+}
+
+// TODO: Check if /sys/class/backlight/.../actual_brightness actually returns
+// correct values. If not, remove this function.
+static int ar02_3inch_bl_get_brightness(struct backlight_device *bl)
+{
+ struct mipi_dsi_device *dsi = bl_get_data(bl);
+ u16 brightness;
+ int ret;
+
+ dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
+
+ ret = mipi_dsi_dcs_get_display_brightness_large(dsi, &brightness);
+ if (ret < 0)
+ return ret;
+
+ dsi->mode_flags |= MIPI_DSI_MODE_LPM;
+
+ return brightness;
+}
+
+static const struct backlight_ops ar02_3inch_bl_ops = {
+ .update_status = ar02_3inch_bl_update_status,
+ .get_brightness = ar02_3inch_bl_get_brightness,
+};
+
+static struct backlight_device *
+ar02_3inch_create_backlight(struct mipi_dsi_device *dsi)
+{
+ struct device *dev = &dsi->dev;
+ const struct backlight_properties props = {
+ .type = BACKLIGHT_RAW,
+ .brightness = 1023,
+ .max_brightness = 1023,
+ };
+
+ return devm_backlight_device_register(dev, dev_name(dev), dev, dsi,
+ &ar02_3inch_bl_ops, &props);
+}
+
+static int ar02_3inch_probe(struct mipi_dsi_device *dsi)
+{
+ struct device *dev = &dsi->dev;
+ struct ar02_3inch *ctx;
+ int ret;
+
+ ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
+ if (!ctx)
+ return -ENOMEM;
+
+ ret = devm_regulator_bulk_get_const(dev, ARRAY_SIZE(panel_supplies),
+ panel_supplies, &ctx->supplies);
+ if (ret < 0){
+ return dev_err_probe(dev, ret, "Failed to get regulators\n");
+ }
+
+ ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
+ if (IS_ERR(ctx->reset_gpio))
+ return dev_err_probe(dev, PTR_ERR(ctx->reset_gpio),
+ "Failed to get reset-gpios\n");
+
+ ctx->dsi = dsi;
+ mipi_dsi_set_drvdata(dsi, ctx);
+
+ dsi->lanes = 4;
+ dsi->format = MIPI_DSI_FMT_RGB888;
+ dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+ MIPI_DSI_CLOCK_NON_CONTINUOUS;
+
+ /* Orientation */
+ ret = of_drm_get_panel_orientation(dev->of_node, &ctx->orientation);
+ if (ret < 0) {
+ dev_err(dev, "failed to get orientation %d\n", ret);
+ return ret;
+ }
+
+ drm_panel_init(&ctx->panel, dev, &ar02_3inch_panel_funcs,
+ DRM_MODE_CONNECTOR_DSI);
+ ctx->panel.prepare_prev_first = true;
+
+ ctx->panel.backlight = ar02_3inch_create_backlight(dsi);
+ if (IS_ERR(ctx->panel.backlight))
+ return dev_err_probe(dev, PTR_ERR(ctx->panel.backlight),
+ "Failed to create backlight\n");
+
+ drm_panel_add(&ctx->panel);
+
+ ret = mipi_dsi_attach(dsi);
+ if (ret < 0) {
+ drm_panel_remove(&ctx->panel);
+ return dev_err_probe(dev, ret, "Failed to attach to DSI host\n");
+ }
+
+ return 0;
+}
+
+static void ar02_3inch_remove(struct mipi_dsi_device *dsi)
+{
+ struct ar02_3inch *ctx = mipi_dsi_get_drvdata(dsi);
+ int ret;
+
+ ret = mipi_dsi_detach(dsi);
+ if (ret < 0)
+ dev_err(&dsi->dev, "Failed to detach from DSI host: %d\n", ret);
+
+ drm_panel_remove(&ctx->panel);
+}
+
+static const struct of_device_id ar02_3inch_of_match[] = {
+ { .compatible = "ayaneo,pocket-dmg-panel" },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, ar02_3inch_of_match);
+
+static struct mipi_dsi_driver ar02_3inch_driver = {
+ .probe = ar02_3inch_probe,
+ .remove = ar02_3inch_remove,
+ .driver = {
+ .name = "panel-ar02-3inch",
+ .of_match_table = ar02_3inch_of_match,
+ },
+};
+module_mipi_dsi_driver(ar02_3inch_driver);
+
+MODULE_AUTHOR("linux-mdss-dsi-panel-driver-generator <fix@me>"); // FIXME
+MODULE_DESCRIPTION("DRM driver for ar02 395inch video mode dsi panel");
+MODULE_LICENSE("GPL");
--
2.50.1
Reference in New Issue View Git Blame Copy Permalink