40 lines
1.0 KiB
C
40 lines
1.0 KiB
C
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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/*
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* Copyright (c) 2021 Amlogic, Inc. All rights reserved.
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*/
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#define PDID_S5_MALI_0 0
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#define PDID_S5_MALI_1 1
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#define PDID_S5_MALI_2 2
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#define PDID_S5_MALI_TOP 3
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#define PDID_S5_DOS_TOP_WRAP 4
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#define PDID_S5_DOS_VDEC 5
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#define PDID_S5_DOS_HCODEC 6
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#define PDID_S5_DOS_HEVC_TOP 7
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#define PDID_S5_DOS_HEVC_CORE1 8
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#define PDID_S5_USB2 9
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#define PDID_S5_PCIE0 10
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#define PDID_S5_GE2D 11
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#define PDID_S5_VC9000E 12
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#define PDID_S5_VICP 13
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#define PDID_S5_VGE_TOP 14
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#define PDID_S5_VI_CLK1 15
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#define PDID_S5_VI_CLK2 16
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#define PDID_S5_VPU_HDMI 17
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#define PDID_S5_ETH 18
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#define PDID_S5_PCIE1 19
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#define PDID_S5_VPU_DOLBY 20
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#define PDID_S5_USB30 21
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#define PDID_S5_USB31 22
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#define PDID_S5_SDCARD 23
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#define PDID_S5_SDIO 24
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#define PDID_S5_NAND_EMMC 25
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#define PDID_S5_NNA_4T 26
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#define PDID_S5_DMC00 27
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#define PDID_S5_DMC01 28
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#define PDID_S5_NOC_DMC_TOP 29
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#define PDID_S5_DMC10 30
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#define PDID_S5_DMC11 31
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#define PDID_S5_DDRPHY0 32
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#define PDID_S5_DDRPHY1 33
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