arch: arm64: boot: dts: allwinner: Support Orange Pi Zero3
This commit is contained in:
orangepi-xunlong
parent
e3eaef8ae5
commit
1c9ffcf412
@ -39,4 +39,5 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64-model-b.dtb
|
||||
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6.dtb
|
||||
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6-mini.dtb
|
||||
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb
|
||||
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero3.dtb
|
||||
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-x96-mate.dtb
|
||||
|
||||
376
arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero3.dts
Executable file
376
arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero3.dts
Executable file
@ -0,0 +1,376 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ or MIT)
|
||||
/*
|
||||
* Copyright (C) 2020 Arm Ltd.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "sun50i-h616.dtsi"
|
||||
#include "sun50i-h616-cpu-opp.dtsi"
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
|
||||
/ {
|
||||
model = "OrangePi Zero3";
|
||||
compatible = "xunlong,orangepi-zero3", "allwinner,sun50i-h616";
|
||||
|
||||
aliases {
|
||||
ethernet0 = &emac0;
|
||||
serial0 = &uart0;
|
||||
serial5 = &uart5;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
connector {
|
||||
compatible = "hdmi-connector";
|
||||
type = "d";
|
||||
|
||||
port {
|
||||
hdmi_con_in: endpoint {
|
||||
remote-endpoint = <&hdmi_out_con>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
leds: leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led-red {
|
||||
label = "red_led";
|
||||
gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */
|
||||
linux,default-trigger = "none";
|
||||
};
|
||||
|
||||
led-green {
|
||||
label = "green_led";
|
||||
gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
};
|
||||
|
||||
reg_vcc5v: vcc5v {
|
||||
/* board wide 5V supply directly from the USB-C socket */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc-5v";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_usb1_vbus: usb1-vbus {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb1-vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
vin-supply = <®_vcc5v>;
|
||||
enable-active-high;
|
||||
gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
reg_vcc33_wifi: vcc33-wifi {
|
||||
/* Always on 3.3V regulator for WiFi and BT */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc33-wifi";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
vin-supply = <®_vcc5v>;
|
||||
};
|
||||
|
||||
reg_vcc_wifi_io: vcc-wifi-io {
|
||||
/* Always on 1.8V/300mA regulator for WiFi and BT IO */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc-wifi-io";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
vin-supply = <®_vcc33_wifi>;
|
||||
};
|
||||
|
||||
wifi_pwrseq: wifi-pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
clocks = <&rtc 1>;
|
||||
clock-names = "osc32k-out";
|
||||
reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>; /* PG18 */
|
||||
post-power-on-delay-ms = <200>;
|
||||
};
|
||||
};
|
||||
|
||||
&de {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
//hvcc-supply = <®_bldo1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi_out {
|
||||
hdmi_out_con: endpoint {
|
||||
remote-endpoint = <&hdmi_con_in>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpu {
|
||||
mali-supply = <®_dcdc1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&emac0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ext_rgmii_pins>;
|
||||
phy-mode = "rgmii";
|
||||
phy-handle = <&ext_rgmii_phy>;
|
||||
allwinner,rx-delay-ps = <1800>;
|
||||
allwinner,tx-delay-ps = <700>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mdio0 {
|
||||
ext_rgmii_phy: ethernet-phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <1>;
|
||||
motorcomm,clk-out-frequency-hz = <125000000>;
|
||||
motorcomm,keep-pll-enabled;
|
||||
motorcomm,auto-sleep-disabled;
|
||||
};
|
||||
};
|
||||
|
||||
&mmc0 {
|
||||
vmmc-supply = <®_dldo1>;
|
||||
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
|
||||
bus-width = <4>;
|
||||
max-frequency = <50000000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
vmmc-supply = <®_vcc33_wifi>;
|
||||
vqmmc-supply = <®_vcc_wifi_io>;
|
||||
mmc-pwrseq = <&wifi_pwrseq>;
|
||||
bus-width = <4>;
|
||||
non-removable;
|
||||
mmc-ddr-1_8v;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&r_i2c {
|
||||
status = "okay";
|
||||
|
||||
axp313a: pmic@36 {
|
||||
compatible = "x-powers,axp313a";
|
||||
reg = <0x36>;
|
||||
wakeup-source;
|
||||
|
||||
regulators{
|
||||
reg_dcdc1: dcdc1 {
|
||||
regulator-name = "axp313a-dcdc1";
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <1100000>;
|
||||
regulator-step-delay-us = <25>;
|
||||
regulator-final-delay-us = <50>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_dcdc2: dcdc2 {
|
||||
regulator-name = "axp313a-dcdc2";
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-step-delay-us = <25>;
|
||||
regulator-final-delay-us = <50>;
|
||||
regulator-ramp-delay = <200>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_dcdc3: dcdc3 {
|
||||
regulator-name = "axp313a-dcdc3";
|
||||
regulator-min-microvolt = <1100000>;
|
||||
regulator-max-microvolt = <1100000>;
|
||||
regulator-step-delay-us = <25>;
|
||||
regulator-final-delay-us = <50>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_aldo1: ldo1 {
|
||||
regulator-name = "axp313a-aldo1";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-step-delay-us = <25>;
|
||||
regulator-final-delay-us = <50>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_dldo1: ldo2 {
|
||||
regulator-name = "axp313a-dldo1";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-step-delay-us = <25>;
|
||||
regulator-final-delay-us = <50>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_ph_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg {
|
||||
/*
|
||||
* PHY0 pins are connected to a USB-C socket, but a role switch
|
||||
* is not implemented: both CC pins are pulled to GND.
|
||||
* The VBUS pins power the device, so a fixed peripheral mode
|
||||
* is the best choice.
|
||||
* The board can be powered via GPIOs, in this case port0 *can*
|
||||
* act as a host (with a cable/adapter ignoring CC), as VBUS is
|
||||
* then provided by the GPIOs. Any user of this setup would
|
||||
* need to adjust the DT accordingly: dr_mode set to "host",
|
||||
* enabling OHCI0 and EHCI0.
|
||||
*/
|
||||
dr_mode = "peripheral";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbphy {
|
||||
usb1_vbus-supply = <®_usb1_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ehci0 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&ehci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ehci2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ehci3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ohci0 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&ohci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ohci2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ohci3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ir {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ir_rx_pin>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart2_ph_pins>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&uart5 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart5_ph_pins>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>;
|
||||
|
||||
spidev@0 {
|
||||
status = "disabled";
|
||||
compatible = "rohm,dh2228fv";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
};
|
||||
|
||||
flash@0 {
|
||||
status = "okay";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <40000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi1_pins>, <&spi1_cs1_pin>;
|
||||
|
||||
spidev@1 {
|
||||
compatible = "rohm,dh2228fv";
|
||||
status = "disabled";
|
||||
reg = <1>;
|
||||
spi-max-frequency = <1000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&codec {
|
||||
allwinner,audio-routing =
|
||||
"Line Out", "LINEOUT";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ahub_dam_plat {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ahub_dam_mach {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ahub1_plat {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ahub1_mach {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
cpu-supply = <®_dcdc2>;
|
||||
status = "okay";
|
||||
};
|
||||
600
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
Normal file → Executable file
600
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
Normal file → Executable file
@ -7,8 +7,11 @@
|
||||
#include <dt-bindings/clock/sun50i-h616-ccu.h>
|
||||
#include <dt-bindings/clock/sun50i-h6-r-ccu.h>
|
||||
#include <dt-bindings/clock/sun6i-rtc.h>
|
||||
#include <dt-bindings/clock/sun8i-de2.h>
|
||||
#include <dt-bindings/clock/sun8i-tcon-top.h>
|
||||
#include <dt-bindings/reset/sun50i-h616-ccu.h>
|
||||
#include <dt-bindings/reset/sun50i-h6-r-ccu.h>
|
||||
#include <dt-bindings/reset/sun8i-de2.h>
|
||||
#include <dt-bindings/thermal/thermal.h>
|
||||
|
||||
/ {
|
||||
@ -28,6 +31,7 @@
|
||||
clocks = <&ccu CLK_CPUX>;
|
||||
clock-latency-ns = <244144>; /* 8 32k periods */
|
||||
#cooling-cells = <2>;
|
||||
operating-points-v2 = <&cpu_opp_table>;
|
||||
};
|
||||
|
||||
cpu1: cpu@1 {
|
||||
@ -38,6 +42,7 @@
|
||||
clocks = <&ccu CLK_CPUX>;
|
||||
clock-latency-ns = <244144>; /* 8 32k periods */
|
||||
#cooling-cells = <2>;
|
||||
operating-points-v2 = <&cpu_opp_table>;
|
||||
};
|
||||
|
||||
cpu2: cpu@2 {
|
||||
@ -48,6 +53,7 @@
|
||||
clocks = <&ccu CLK_CPUX>;
|
||||
clock-latency-ns = <244144>; /* 8 32k periods */
|
||||
#cooling-cells = <2>;
|
||||
operating-points-v2 = <&cpu_opp_table>;
|
||||
};
|
||||
|
||||
cpu3: cpu@3 {
|
||||
@ -58,9 +64,16 @@
|
||||
clocks = <&ccu CLK_CPUX>;
|
||||
clock-latency-ns = <244144>; /* 8 32k periods */
|
||||
#cooling-cells = <2>;
|
||||
operating-points-v2 = <&cpu_opp_table>;
|
||||
};
|
||||
};
|
||||
|
||||
de: display-engine {
|
||||
compatible = "allwinner,sun50i-h6-display-engine";
|
||||
allwinner,pipelines = <&mixer0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
@ -117,17 +130,63 @@
|
||||
#size-cells = <1>;
|
||||
ranges = <0x0 0x0 0x0 0x40000000>;
|
||||
|
||||
bus@1000000 {
|
||||
compatible = "allwinner,sun50i-h616-de33",
|
||||
"allwinner,sun50i-a64-de2";
|
||||
reg = <0x1000000 0x400000>;
|
||||
allwinner,sram = <&de3_sram 1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x1000000 0x400000>;
|
||||
|
||||
display_clocks: clock@8000 {
|
||||
compatible = "allwinner,sun50i-h616-de33-clk";
|
||||
reg = <0x8000 0x100>;
|
||||
clocks = <&ccu CLK_DE>, <&ccu CLK_BUS_DE>;
|
||||
clock-names = "mod", "bus";
|
||||
resets = <&ccu RST_BUS_DE>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
mixer0: mixer@100000 {
|
||||
compatible = "allwinner,sun50i-h616-de33-mixer-0";
|
||||
reg = <0x100000 0x100000>,
|
||||
<0x8100 0x40>,
|
||||
<0x280000 0x20000>;
|
||||
clocks = <&display_clocks CLK_BUS_MIXER0>,
|
||||
<&display_clocks CLK_MIXER0>;
|
||||
clock-names = "bus", "mod";
|
||||
resets = <&display_clocks RST_MIXER0>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mixer0_out: port@1 {
|
||||
reg = <1>;
|
||||
|
||||
mixer0_out_tcon_top_mixer0: endpoint {
|
||||
remote-endpoint = <&tcon_top_mixer0_in_mixer0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gpu: gpu@1800000 {
|
||||
compatible = "allwinner,sun50i-h616-mali",
|
||||
"arm,mali-bifrost";
|
||||
"arm,mali-bifrost";
|
||||
reg = <0x1800000 0x40000>;
|
||||
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
|
||||
<GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "job", "mmu", "gpu";
|
||||
clocks = <&ccu CLK_GPU0>, <&ccu CLK_BUS_GPU>;
|
||||
clock-names = "core", "bus";
|
||||
resets = <&ccu RST_BUS_GPU>;
|
||||
//operating-points-v2 = <&gpu_opp_table>;
|
||||
//#cooling-cells = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -149,12 +208,31 @@
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
sram_a2: sram@100000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0x00100000 0x18000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x00100000 0x18000>;
|
||||
|
||||
scpi_sram: scpi-sram@17c00 {
|
||||
compatible = "arm,scp-shmem";
|
||||
reg = <0x17c00 0x200>;
|
||||
};
|
||||
};
|
||||
|
||||
sram_c: sram@28000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0x00028000 0x30000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x00028000 0x30000>;
|
||||
|
||||
de3_sram: sram-section@0 {
|
||||
compatible = "allwinner,sun50i-h616-sram-c",
|
||||
"allwinner,sun50i-a64-sram-c";
|
||||
reg = <0x0000 0x1e000>;
|
||||
};
|
||||
};
|
||||
|
||||
sram_c1: sram@1a00000 {
|
||||
@ -201,6 +279,54 @@
|
||||
reg = <0x030090a0 0x20>;
|
||||
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&osc24M>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pwm: pwm@300a000 {
|
||||
compatible = "allwinner,sun50i-h616-pwm";
|
||||
reg = <0x0300a000 0x400>;
|
||||
clocks = <&osc24M>, <&ccu CLK_BUS_PWM>;
|
||||
clock-names = "mod", "bus";
|
||||
resets = <&ccu RST_BUS_PWM>;
|
||||
pwm-number = <6>;
|
||||
pwm-base = <0x0>;
|
||||
sunxi-pwms = <&pwm0>, <&pwm1>, <&pwm2>, <&pwm3>, <&pwm4>, <&pwm5>;
|
||||
#pwm-cells = <3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pwm0: pwm0@0300a000 {
|
||||
compatible = "allwinner,sunxi-pwm0";
|
||||
};
|
||||
|
||||
pwm1: pwm1@0300a000 {
|
||||
compatible = "allwinner,sunxi-pwm1";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pwm1_pin>;
|
||||
};
|
||||
|
||||
pwm2: pwm2@0300a000 {
|
||||
compatible = "allwinner,sunxi-pwm2";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pwm2_pin>;
|
||||
};
|
||||
|
||||
pwm3: pwm3@0300a000 {
|
||||
compatible = "allwinner,sunxi-pwm3";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pwm3_pin>;
|
||||
};
|
||||
|
||||
pwm4: pwm4@0300a000 {
|
||||
compatible = "allwinner,sunxi-pwm4";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pwm4_pin>;
|
||||
};
|
||||
|
||||
pwm5: pwm5@0300a000 {
|
||||
compatible = "allwinner,sunxi-pwm5";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pwm5_pin>;
|
||||
};
|
||||
|
||||
pio: pinctrl@300b000 {
|
||||
@ -235,16 +361,61 @@
|
||||
function = "i2c0";
|
||||
};
|
||||
|
||||
i2c3_ph_pins: i2c3-ph-pins {
|
||||
i2c1_pins: i2c1-pins {
|
||||
pins = "PH0", "PH1";
|
||||
function = "i2c1";
|
||||
};
|
||||
|
||||
i2c2_pins: i2c2-pins {
|
||||
pins = "PH2", "PH3";
|
||||
function = "i2c2";
|
||||
};
|
||||
|
||||
i2c3_pins: i2c3-pins {
|
||||
pins = "PH4", "PH5";
|
||||
function = "i2c3";
|
||||
};
|
||||
|
||||
i2c4_pins: i2c4-pins {
|
||||
pins = "PH6", "PH7";
|
||||
function = "i2c4";
|
||||
};
|
||||
|
||||
i2s3_pins: i2s3-pins {
|
||||
pins = "PH5", "PH6", "PH7", "PH8", "PH9";
|
||||
function = "i2s3";
|
||||
};
|
||||
|
||||
ir_rx_pin: ir-rx-pin {
|
||||
pins = "PH10";
|
||||
function = "ir_rx";
|
||||
};
|
||||
|
||||
pwm1_pin: pwm1-pin {
|
||||
pins = "PH3";
|
||||
function = "pwm1";
|
||||
};
|
||||
|
||||
pwm2_pin: pwm2-pin {
|
||||
pins = "PH2";
|
||||
function = "pwm2";
|
||||
};
|
||||
|
||||
pwm3_pin: pwm3-pin {
|
||||
pins = "PH0";
|
||||
function = "pwm3";
|
||||
};
|
||||
|
||||
pwm4_pin: pwm4-pin {
|
||||
pins = "PH1";
|
||||
function = "pwm4";
|
||||
};
|
||||
|
||||
pwm5_pin: pwm5-pin {
|
||||
pins = "PA12";
|
||||
function = "pwm5";
|
||||
};
|
||||
|
||||
mmc0_pins: mmc0-pins {
|
||||
pins = "PF0", "PF1", "PF2", "PF3",
|
||||
"PF4", "PF5";
|
||||
@ -271,6 +442,13 @@
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
rmii_pins: rmii-pins {
|
||||
pins = "PA0", "PA1", "PA2", "PA3", "PA4",
|
||||
"PA5", "PA6", "PA7", "PA8", "PA9";
|
||||
function = "emac1";
|
||||
drive-strength = <40>;
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
spi0_pins: spi0-pins {
|
||||
pins = "PC0", "PC2", "PC4";
|
||||
@ -292,6 +470,12 @@
|
||||
/omit-if-no-ref/
|
||||
spi1_cs0_pin: spi1-cs0-pin {
|
||||
pins = "PH5";
|
||||
function = "spi0";
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
spi1_cs1_pin: spi1-cs1-pin {
|
||||
pins = "PH9";
|
||||
function = "spi1";
|
||||
};
|
||||
|
||||
@ -311,6 +495,24 @@
|
||||
pins = "PG8", "PG9";
|
||||
function = "uart1";
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart2_ph_pins: uart2-ph-pins {
|
||||
pins = "PH5", "PH6";
|
||||
function = "uart2";
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart2_rts_cts_pins: uart2-rts-cts-pins {
|
||||
pins = "PH7", "PH8";
|
||||
function = "uart2";
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart5_ph_pins: uart5-ph-pins {
|
||||
pins = "PH2", "PH3";
|
||||
function = "uart5";
|
||||
};
|
||||
};
|
||||
|
||||
gic: interrupt-controller@3021000 {
|
||||
@ -387,6 +589,101 @@
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
dma: dma-controller@3002000 {
|
||||
compatible = "allwinner,sun50i-h616-dma";
|
||||
reg = <0x03002000 0x1000>;
|
||||
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&ccu CLK_BUS_DMA>, <&ccu CLK_MBUS_DMA>;
|
||||
clock-names = "bus", "mbus";
|
||||
dma-channels = <16>;
|
||||
dma-requests = <49>;
|
||||
resets = <&ccu RST_BUS_DMA>;
|
||||
#dma-cells = <1>;
|
||||
};
|
||||
|
||||
codec: codec@05096000 {
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "allwinner,sun50i-h616-codec";
|
||||
reg = <0x05096000 0x31c>;
|
||||
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&ccu CLK_BUS_AUDIO_CODEC>,
|
||||
<&ccu CLK_AUDIO_CODEC_1X>,
|
||||
<&ccu CLK_AUDIO_CODEC_4X>;
|
||||
clock-names = "apb", "audio-codec-1x", "audio-codec-4x";
|
||||
resets = <&ccu RST_BUS_AUDIO_CODEC>;
|
||||
dmas = <&dma 6>;
|
||||
dma-names = "tx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ahub_dam_plat:ahub_dam_plat@5097000 {
|
||||
#sound-dai-cells = <0>;
|
||||
/* sound card without pcm for hardware mix setting */
|
||||
compatible = "allwinner,sunxi-snd-plat-ahub_dam";
|
||||
reg = <0x05097000 0x1000>;
|
||||
resets = <&ccu RST_BUS_AUDIO_HUB>;
|
||||
clocks = <&ccu CLK_AUDIO_CODEC_1X>,
|
||||
<&ccu CLK_AUDIO_CODEC_4X>,
|
||||
<&ccu CLK_AUDIO_HUB>,
|
||||
<&ccu CLK_BUS_AUDIO_HUB>;
|
||||
clock-names = "clk_pll_audio",
|
||||
"clk_pll_audio_4x",
|
||||
"clk_audio_hub",
|
||||
"clk_bus_audio_hub";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ahub_dam_mach:ahub_dam_mach {
|
||||
compatible = "allwinner,sunxi-snd-mach";
|
||||
soundcard-mach,name = "ahubdam";
|
||||
status = "disabled";
|
||||
soundcard-mach,cpu {
|
||||
sound-dai = <&ahub_dam_plat>;
|
||||
};
|
||||
soundcard-mach,codec {
|
||||
};
|
||||
};
|
||||
|
||||
ahub1_plat:ahub1_plat {
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "allwinner,sunxi-snd-plat-ahub";
|
||||
apb_num = <1>; /* for dma port 4 */
|
||||
dmas = <&dma 4>, <&dma 4>;
|
||||
dma-names = "tx", "rx";
|
||||
playback_cma = <128>;
|
||||
capture_cma = <128>;
|
||||
tx_fifo_size = <128>;
|
||||
rx_fifo_size = <128>;
|
||||
|
||||
tdm_num = <1>;
|
||||
tx_pin = <0>;
|
||||
rx_pin = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ahub1_mach:ahub1_mach {
|
||||
compatible = "allwinner,sunxi-snd-mach";
|
||||
soundcard-mach,name = "ahubhdmi";
|
||||
|
||||
soundcard-mach,format = "i2s";
|
||||
soundcard-mach,frame-master = <&ahub1_cpu>;
|
||||
soundcard-mach,bitclock-master = <&ahub1_cpu>;
|
||||
/* soundcard-mach,frame-inversion; */
|
||||
/* soundcard-mach,bitclock-inversion; */
|
||||
soundcard-mach,slot-num = <2>;
|
||||
soundcard-mach,slot-width = <32>;
|
||||
status = "disabled";
|
||||
ahub1_cpu: soundcard-mach,cpu {
|
||||
sound-dai = <&ahub1_plat>;
|
||||
soundcard-mach,pll-fs = <4>;
|
||||
soundcard-mach,mclk-fs = <0>;
|
||||
};
|
||||
|
||||
ahub1_codec: soundcard-mach,codec {
|
||||
sound-dai = <&hdmi>;
|
||||
};
|
||||
};
|
||||
|
||||
uart0: serial@5000000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x05000000 0x400>;
|
||||
@ -476,6 +773,8 @@
|
||||
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&ccu CLK_BUS_I2C1>;
|
||||
resets = <&ccu RST_BUS_I2C1>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
@ -489,6 +788,8 @@
|
||||
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&ccu CLK_BUS_I2C2>;
|
||||
resets = <&ccu RST_BUS_I2C2>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c2_pins>;
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
@ -502,6 +803,8 @@
|
||||
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&ccu CLK_BUS_I2C3>;
|
||||
resets = <&ccu RST_BUS_I2C3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c3_pins>;
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
@ -515,6 +818,8 @@
|
||||
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&ccu CLK_BUS_I2C4>;
|
||||
resets = <&ccu RST_BUS_I2C4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c4_pins>;
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
@ -530,6 +835,8 @@
|
||||
resets = <&ccu RST_BUS_SPI0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi0_pins>;
|
||||
dmas = <&dma 22>, <&dma 22>;
|
||||
dma-names = "rx", "tx";
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
@ -544,7 +851,9 @@
|
||||
clock-names = "ahb", "mod";
|
||||
resets = <&ccu RST_BUS_SPI1>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi1_pins>;
|
||||
pinctrl-0 = <&spi1_pins>, <&spi1_cs1_pin>;
|
||||
dmas = <&dma 23>, <&dma 23>;
|
||||
dma-names = "rx", "tx";
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
@ -570,6 +879,25 @@
|
||||
};
|
||||
};
|
||||
|
||||
emac1: ethernet@5030000 {
|
||||
compatible = "allwinner,sun50i-h616-emac";
|
||||
syscon = <&syscon 1>;
|
||||
reg = <0x05030000 0x10000>;
|
||||
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "macirq";
|
||||
resets = <&ccu RST_BUS_EMAC1>;
|
||||
reset-names = "stmmaceth";
|
||||
clocks = <&ccu CLK_BUS_EMAC1>;
|
||||
clock-names = "stmmaceth";
|
||||
status = "disabled";
|
||||
|
||||
mdio1: mdio {
|
||||
compatible = "snps,dwmac-mdio";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
usbotg: usb@5100000 {
|
||||
compatible = "allwinner,sun50i-h616-musb",
|
||||
"allwinner,sun8i-h3-musb";
|
||||
@ -742,6 +1070,147 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hdmi: hdmi@6000000 {
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "allwinner,sun50i-h616-dw-hdmi",
|
||||
"allwinner,sun50i-h6-dw-hdmi";
|
||||
reg = <0x06000000 0x10000>;
|
||||
reg-io-width = <1>;
|
||||
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>,
|
||||
<&ccu CLK_HDMI>, <&ccu CLK_HDMI_CEC>,
|
||||
<&ccu CLK_HDCP>, <&ccu CLK_BUS_HDCP>;
|
||||
clock-names = "iahb", "isfr", "tmds", "cec", "hdcp",
|
||||
"hdcp-bus";
|
||||
resets = <&ccu RST_BUS_HDMI>, <&ccu RST_BUS_HDCP>;
|
||||
reset-names = "ctrl", "hdcp";
|
||||
phys = <&hdmi_phy>;
|
||||
phy-names = "phy";
|
||||
status = "disabled";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
hdmi_in: port@0 {
|
||||
reg = <0>;
|
||||
|
||||
hdmi_in_tcon_top: endpoint {
|
||||
remote-endpoint = <&tcon_top_hdmi_out_hdmi>;
|
||||
};
|
||||
};
|
||||
|
||||
hdmi_out: port@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
hdmi_phy: hdmi-phy@6010000 {
|
||||
compatible = "allwinner,sun50i-h616-hdmi-phy";
|
||||
reg = <0x06010000 0x10000>;
|
||||
clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>;
|
||||
clock-names = "bus", "mod";
|
||||
resets = <&ccu RST_BUS_HDMI_SUB>;
|
||||
reset-names = "phy";
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
|
||||
tcon_top: tcon-top@6510000 {
|
||||
compatible = "allwinner,sun50i-h6-tcon-top";
|
||||
reg = <0x06510000 0x1000>;
|
||||
clocks = <&ccu CLK_BUS_TCON_TOP>,
|
||||
<&ccu CLK_TCON_TV0>;
|
||||
clock-names = "bus",
|
||||
"tcon-tv0";
|
||||
clock-output-names = "tcon-top-tv0";
|
||||
resets = <&ccu RST_BUS_TCON_TOP>;
|
||||
#clock-cells = <1>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
tcon_top_mixer0_in: port@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
|
||||
tcon_top_mixer0_in_mixer0: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&mixer0_out_tcon_top_mixer0>;
|
||||
};
|
||||
};
|
||||
|
||||
tcon_top_mixer0_out: port@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <1>;
|
||||
|
||||
tcon_top_mixer0_out_tcon_tv: endpoint@2 {
|
||||
reg = <2>;
|
||||
remote-endpoint = <&tcon_tv_in_tcon_top_mixer0>;
|
||||
};
|
||||
};
|
||||
|
||||
tcon_top_hdmi_in: port@4 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <4>;
|
||||
|
||||
tcon_top_hdmi_in_tcon_tv: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&tcon_tv_out_tcon_top>;
|
||||
};
|
||||
};
|
||||
|
||||
tcon_top_hdmi_out: port@5 {
|
||||
reg = <5>;
|
||||
|
||||
tcon_top_hdmi_out_hdmi: endpoint {
|
||||
remote-endpoint = <&hdmi_in_tcon_top>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
tcon_tv: lcd-controller@6515000 {
|
||||
compatible = "allwinner,sun50i-h6-tcon-tv",
|
||||
"allwinner,sun8i-r40-tcon-tv";
|
||||
reg = <0x06515000 0x1000>;
|
||||
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&ccu CLK_BUS_TCON_TV0>,
|
||||
<&tcon_top CLK_TCON_TOP_TV0>;
|
||||
clock-names = "ahb",
|
||||
"tcon-ch1";
|
||||
resets = <&ccu RST_BUS_TCON_TV0>;
|
||||
reset-names = "lcd";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
tcon_tv_in: port@0 {
|
||||
reg = <0>;
|
||||
|
||||
tcon_tv_in_tcon_top_mixer0: endpoint {
|
||||
remote-endpoint = <&tcon_top_mixer0_out_tcon_tv>;
|
||||
};
|
||||
};
|
||||
|
||||
tcon_tv_out: port@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <1>;
|
||||
|
||||
tcon_tv_out_tcon_top: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&tcon_top_hdmi_in_tcon_tv>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
rtc: rtc@7000000 {
|
||||
compatible = "allwinner,sun50i-h616-rtc";
|
||||
reg = <0x07000000 0x400>;
|
||||
@ -830,6 +1299,12 @@
|
||||
};
|
||||
|
||||
ths: thermal-sensor@5070400 {
|
||||
/* The Thermal Sensor Controller(THS) embeds four thermal sensors,
|
||||
sensor0 is located in GPU
|
||||
sensor1 is located in VE
|
||||
sensor2 is located in CPU
|
||||
sensor3 is located in DDR
|
||||
*/
|
||||
compatible = "allwinner,sun50i-h616-ths";
|
||||
reg = <0x05070400 0x400>;
|
||||
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@ -840,58 +1315,81 @@
|
||||
nvmem-cell-names = "calibration";
|
||||
#thermal-sensor-cells = <1>;
|
||||
};
|
||||
|
||||
dump_reg: dump_reg@20000 {
|
||||
compatible = "allwinner,sunxi-dump-reg";
|
||||
reg = <0x0 0x03001000 0x0 0x0f20>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
sunxi-info {
|
||||
compatible = "allwinner,sun50i-h616-sys-info";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
addr_mgt: addr-mgt {
|
||||
compatible = "allwinner,sunxi-addr_mgt";
|
||||
type_addr_wifi = <0x2>;
|
||||
type_addr_bt = <0x2>;
|
||||
type_addr_eth = <0x2>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
cpu-thermal {
|
||||
polling-delay-passive = <500>;
|
||||
polling-delay = <1000>;
|
||||
polling-delay-passive = <0>;
|
||||
polling-delay = <0>;
|
||||
thermal-sensors = <&ths 2>;
|
||||
sustainable-power = <1000>;
|
||||
k_po = <20>;
|
||||
k_pu = <40>;
|
||||
k_i = <0>;
|
||||
|
||||
trips {
|
||||
cpu_threshold: trip-point@0 {
|
||||
temperature = <60000>;
|
||||
cpu_alert: cpu-alert {
|
||||
temperature = <85000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
hysteresis = <0>;
|
||||
};
|
||||
cpu_target: trip-point@1 {
|
||||
temperature = <70000>;
|
||||
type = "passive";
|
||||
|
||||
cpu-crit {
|
||||
temperature = <100000>;
|
||||
hysteresis = <0>;
|
||||
};
|
||||
cpu_temp_critical: trip-point@2 {
|
||||
temperature = <110000>;
|
||||
type = "critical";
|
||||
hysteresis = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu_target>;
|
||||
trip = <&cpu_alert>;
|
||||
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gpu-thermal {
|
||||
polling-delay-passive = <500>;
|
||||
polling-delay = <1000>;
|
||||
polling-delay-passive = <0>;
|
||||
polling-delay = <0>;
|
||||
thermal-sensors = <&ths 0>;
|
||||
sustainable-power = <1100>;
|
||||
|
||||
trips {
|
||||
gpu_temp_critical: trip-point@0 {
|
||||
temperature = <110000>;
|
||||
type = "critical";
|
||||
gpu_alert: gpu-alert {
|
||||
temperature = <85000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
gpu-crit {
|
||||
temperature = <100000>;
|
||||
hysteresis = <0>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&gpu_alert>;
|
||||
cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -902,10 +1400,10 @@
|
||||
thermal-sensors = <&ths 1>;
|
||||
|
||||
trips {
|
||||
ve_temp_critical: trip-point@0 {
|
||||
temperature = <110000>;
|
||||
type = "critical";
|
||||
hysteresis = <0>;
|
||||
ve_alert: ve-alert {
|
||||
temperature = <85000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -916,12 +1414,36 @@
|
||||
thermal-sensors = <&ths 3>;
|
||||
|
||||
trips {
|
||||
ddr_temp_critical: trip-point@0 {
|
||||
temperature = <110000>;
|
||||
type = "critical";
|
||||
hysteresis = <0>;
|
||||
ddr_alert: ddr-alert {
|
||||
temperature = <85000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gpu_opp_table: gpu-opp-table {
|
||||
compatible = "operating-points-v2";
|
||||
opp-125000000 {
|
||||
opp-hz = /bits/ 64 <125000000>;
|
||||
opp-microvolt = <810000>;
|
||||
};
|
||||
opp-250000000 {
|
||||
opp-hz = /bits/ 64 <250000000>;
|
||||
opp-microvolt = <810000>;
|
||||
};
|
||||
opp-432000000 {
|
||||
opp-hz = /bits/ 64 <432000000>;
|
||||
opp-microvolt = <810000>;
|
||||
};
|
||||
opp-600000000 {
|
||||
opp-hz = /bits/ 64 <600000000>;
|
||||
opp-microvolt = <960000>;
|
||||
};
|
||||
opp-800000000 {
|
||||
opp-hz = /bits/ 64 <800000000>;
|
||||
opp-microvolt = <1080000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user