56ef320ad6
These might be useful in case the code requires maintenance/changes. Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de>
25 lines
620 B
ArmAsm
25 lines
620 B
ArmAsm
/*
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* Request AArch32/AArch64 warm reset, using RVBAR and Reset Management Register
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*/
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rmr_request:
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ldr r0, 1f /* RVBAR register address */
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ldr r1, 2f /* desired entry point (reset vector) */
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str r1, [r0]
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dsb
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isb /* make sure we write the address */
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ldr r1, 3f /* RMR mode: bit 1 = RR, bit 0 = AA64 */
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mrc p15, 0, r0, c12, c0, 2 /* read RMR */
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orr r0, r0, r1 /* request warm reset (according to rmr_mode) */
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mcr p15, 0, r0, c12, c0, 2 /* write RMR, trigger reset */
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isb
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0:
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wfi
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b 0b /* loop */
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1: .word 0 /* rvbar_reg */
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2: .word 0 /* entry_point */
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3: .word 0 /* rmr_mode (2 = AArch32, 3 = AArch64) */
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