142 lines
5.1 KiB
Diff
142 lines
5.1 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Jernej Skrabec <[email protected]>
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Date: Sun, 12 Oct 2025 21:23:09 +0200
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Subject: drm/sun4i: vi layer: Write attributes in one go
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It turns out that none of the VI channel registers were meant to be
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read. Mostly it works fine but sometimes it returns incorrect values.
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Rework VI layer code to write all registers in one go to avoid reads.
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This rework will also allow proper code separation.
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Reviewed-by: Chen-Yu Tsai <[email protected]>
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Tested-by: Ryan Walklin <[email protected]>
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Signed-off-by: Jernej Skrabec <[email protected]>
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---
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drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 71 ++++------
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1 file changed, 27 insertions(+), 44 deletions(-)
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diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
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index 111111111111..222222222222 100644
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--- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
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+++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
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@@ -18,34 +18,35 @@
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#include "sun8i_vi_layer.h"
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#include "sun8i_vi_scaler.h"
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-static void sun8i_vi_layer_update_alpha(struct sun8i_mixer *mixer, int channel,
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- int overlay, struct drm_plane *plane)
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+static void sun8i_vi_layer_update_attributes(struct sun8i_mixer *mixer,
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+ int channel, int overlay,
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+ struct drm_plane *plane)
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{
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- u32 mask, val, ch_base;
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+ struct drm_plane_state *state = plane->state;
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+ const struct drm_format_info *fmt;
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+ u32 val, ch_base, hw_fmt;
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ch_base = sun8i_channel_base(mixer, channel);
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+ fmt = state->fb->format;
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+ sun8i_mixer_drm_format_to_hw(fmt->format, &hw_fmt);
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+ val = hw_fmt << SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_OFFSET;
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+ if (!fmt->is_yuv)
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+ val |= SUN8I_MIXER_CHAN_VI_LAYER_ATTR_RGB_MODE;
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+ val |= SUN8I_MIXER_CHAN_VI_LAYER_ATTR_EN;
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if (mixer->cfg->de_type >= SUN8I_MIXER_DE3) {
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- mask = SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MASK |
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- SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MODE_MASK;
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- val = SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA
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- (plane->state->alpha >> 8);
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-
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- val |= (plane->state->alpha == DRM_BLEND_ALPHA_OPAQUE) ?
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+ val |= SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA(state->alpha >> 8);
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+ val |= (state->alpha == DRM_BLEND_ALPHA_OPAQUE) ?
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SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MODE_PIXEL :
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SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MODE_COMBINED;
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-
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- regmap_update_bits(mixer->engine.regs,
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- SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base,
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- overlay),
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- mask, val);
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} else if (mixer->cfg->vi_num == 1) {
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- regmap_update_bits(mixer->engine.regs,
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- SUN8I_MIXER_FCC_GLOBAL_ALPHA_REG,
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- SUN8I_MIXER_FCC_GLOBAL_ALPHA_MASK,
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- SUN8I_MIXER_FCC_GLOBAL_ALPHA
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- (plane->state->alpha >> 8));
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+ regmap_write(mixer->engine.regs,
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+ SUN8I_MIXER_FCC_GLOBAL_ALPHA_REG,
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+ SUN8I_MIXER_FCC_GLOBAL_ALPHA(state->alpha >> 8));
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}
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+
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+ regmap_write(mixer->engine.regs,
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+ SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), val);
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}
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static void sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel,
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@@ -194,23 +195,14 @@ static u32 sun8i_vi_layer_get_csc_mode(const struct drm_format_info *format)
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}
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}
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-static void sun8i_vi_layer_update_formats(struct sun8i_mixer *mixer, int channel,
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- int overlay, struct drm_plane *plane)
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+static void sun8i_vi_layer_update_colors(struct sun8i_mixer *mixer, int channel,
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+ int overlay, struct drm_plane *plane)
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{
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struct drm_plane_state *state = plane->state;
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- u32 val, ch_base, csc_mode, hw_fmt;
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const struct drm_format_info *fmt;
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-
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- ch_base = sun8i_channel_base(mixer, channel);
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+ u32 csc_mode;
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fmt = state->fb->format;
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- sun8i_mixer_drm_format_to_hw(fmt->format, &hw_fmt);
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-
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- val = hw_fmt << SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_OFFSET;
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- regmap_update_bits(mixer->engine.regs,
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- SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay),
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- SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_MASK, val);
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-
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csc_mode = sun8i_vi_layer_get_csc_mode(fmt);
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if (csc_mode != SUN8I_CSC_MODE_OFF) {
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sun8i_csc_set_ccsc_coefficients(mixer, channel, csc_mode,
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@@ -220,15 +212,6 @@ static void sun8i_vi_layer_update_formats(struct sun8i_mixer *mixer, int channel
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} else {
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sun8i_csc_enable_ccsc(mixer, channel, false);
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}
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-
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- if (!fmt->is_yuv)
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- val = SUN8I_MIXER_CHAN_VI_LAYER_ATTR_RGB_MODE;
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- else
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- val = 0;
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-
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- regmap_update_bits(mixer->engine.regs,
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- SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay),
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- SUN8I_MIXER_CHAN_VI_LAYER_ATTR_RGB_MODE, val);
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}
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static void sun8i_vi_layer_update_buffer(struct sun8i_mixer *mixer, int channel,
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@@ -340,12 +323,12 @@ static void sun8i_vi_layer_atomic_update(struct drm_plane *plane,
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if (!new_state->crtc || !new_state->visible)
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return;
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+ sun8i_vi_layer_update_attributes(mixer, layer->channel,
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+ layer->overlay, plane);
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sun8i_vi_layer_update_coord(mixer, layer->channel,
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layer->overlay, plane);
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- sun8i_vi_layer_update_alpha(mixer, layer->channel,
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- layer->overlay, plane);
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- sun8i_vi_layer_update_formats(mixer, layer->channel,
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- layer->overlay, plane);
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+ sun8i_vi_layer_update_colors(mixer, layer->channel,
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+ layer->overlay, plane);
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sun8i_vi_layer_update_buffer(mixer, layer->channel,
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layer->overlay, plane);
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}
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--
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Armbian
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