115 lines
3.0 KiB
Diff
115 lines
3.0 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: The-going <[email protected]>
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Date: Sat, 21 Sep 2024 11:28:33 +0300
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Subject: arm64: dts: sun50i-h313-x96q-lpddr3
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Add support X96Q TV Box LPDDR3 H313
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Author: sicXnull <[email protected]>
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Signed-off-by: The-going <[email protected]>
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---
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arch/arm64/boot/dts/allwinner/sun50i-h313-cpu-opp.dtsi | 92 ++++++++++
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1 file changed, 92 insertions(+)
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diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h313-cpu-opp.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h313-cpu-opp.dtsi
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new file mode 100644
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index 000000000000..111111111111
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--- /dev/null
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-h313-cpu-opp.dtsi
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@@ -0,0 +1,92 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+// Copyright (C) 2021 Piotr Oniszczuk <[email protected]>
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+
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+/*
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+ X96-q DDR3 vendor Android DT:
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+ 480000000 900mV
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+ 600000000 900mV
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+ 792000000 900mV
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+ 1008000000 920mV
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+ 1200000000 980mV
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+ 1344000000 1120mV
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+ 1416000000 1140mV
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+ 1512000000 1160mV
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+*/
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+
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+/ {
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+ cpu_opp_table: opp-table-cpu {
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+ compatible = "allwinner,sun50i-h616-operating-points";
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+ nvmem-cells = <&cpu_speed_grade>;
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+ opp-shared;
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+
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+ opp-480000000 {
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ opp-hz = /bits/ 64 <480000000>;
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+
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+ opp-microvolt-speed0 = <900000 900000 1100000>;
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+ opp-microvolt-speed1 = <900000 900000 1100000>;
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+ opp-microvolt-speed2 = <900000 900000 1100000>;
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+ };
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+
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+ opp-600000000 {
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ opp-hz = /bits/ 64 <600000000>;
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+
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+ opp-microvolt-speed0 = <900000 900000 1100000>;
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+ opp-microvolt-speed1 = <900000 900000 1100000>;
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+ opp-microvolt-speed2 = <900000 900000 1100000>;
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+ };
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+
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+ opp-792000000 {
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ opp-hz = /bits/ 64 <792000000>;
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+
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+ opp-microvolt-speed0 = <900000 900000 1100000>;
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+ opp-microvolt-speed1 = <900000 900000 1100000>;
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+ opp-microvolt-speed2 = <900000 900000 1100000>;
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+ };
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+
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+ opp-1008000000 {
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ opp-hz = /bits/ 64 <1008000000>;
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+
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+ opp-microvolt-speed0 = <920000 920000 1100000>;
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+ opp-microvolt-speed1 = <920000 920000 1100000>;
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+ opp-microvolt-speed2 = <920000 920000 1100000>;
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+ };
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+
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+ opp-1200000000 {
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ opp-hz = /bits/ 64 <1200000000>;
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+
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+ opp-microvolt-speed0 = <980000 980000 1100000>;
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+ opp-microvolt-speed1 = <980000 980000 1100000>;
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+ opp-microvolt-speed2 = <980000 980000 1100000>;
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+ };
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+
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+ opp-1512000000 {
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+ clock-latency-ns = <244144>; /* 8 32k periods */
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+ opp-hz = /bits/ 64 <1512000000>;
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+
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+ opp-microvolt-speed0 = <1100000 1100000 1100000>;
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+ opp-microvolt-speed1 = <1100000 1100000 1100000>;
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+ opp-microvolt-speed2 = <1100000 1100000 1100000>;
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+ };
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+ };
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+};
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+
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+&cpu0 {
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+ operating-points-v2 = <&cpu_opp_table>;
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+};
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+
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+&cpu1 {
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+ operating-points-v2 = <&cpu_opp_table>;
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+};
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+
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+&cpu2 {
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+ operating-points-v2 = <&cpu_opp_table>;
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+};
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+
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+&cpu3 {
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+ operating-points-v2 = <&cpu_opp_table>;
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+};
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--
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Armbian
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