349 lines
6.7 KiB
Plaintext
349 lines
6.7 KiB
Plaintext
This document describes overlays provided in the kernel packages
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For generic Armbian overlays documentation please see
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https://docs.armbian.com/User-Guide_Armbian_overlays/
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### Platform:
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sun7i-a20 (Allwinner A20)
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### Platform details:
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Supported pin banks: PB, PC, PD, PE, PG, PH, PI
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SPI controller 0 have 2 exposed hardware CS,
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other SPI controllers have only one hardware CS
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Reference: A20 Datasheet sections 6.3.5.1, 1.19.2
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I2C bus 0 is used for the AXP209 PMIC
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### Provided overlays:
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- analog-codec
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- can
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- i2c1
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- i2c2
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- i2c3
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- i2c4
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- i2s0
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- i2s1
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- mmc2
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- nand
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- pps-gpio
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- pwm
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- spdif-out
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- spi0
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- spi1
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- spi2
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- spi-add-cs1
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- spi-jedec-nor
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- spi-spidev
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- uart1
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- uart2
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- uart3
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- uart4
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- uart5
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- uart6
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- uart7
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- w1-gpio
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### Overlay details:
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### analog-codec
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Activates SoC analog codec driver that provides Line Out and Mic In
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functionality
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## can
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Activates SoC CAN controller
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CAN pins (TX, RX): PH20, PH21
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### i2c1
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Activates TWI/I2C bus 1
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I2C1 pins (SCL, SDA): PB18, PB19
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### i2c2
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Activates TWI/I2C bus 2
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I2C2 pins (SCL, SDA): PB20, PB21
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### i2c3
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Activates TWI/I2C bus 3
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I2C3 pins (SCL, SDA): PI0, PI1
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### i2c4
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Activates TWI/I2C bus 4
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I2C4 pins (SCL, SDA): PI2, PI3
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### i2s0
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Activates SoC I2S controller 0
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I2S0 pins (MCLK, BCLK, LRCK, DO0, DO1, DO2, DO3, DI): PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12
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### i2s1
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Activates SoC I2S controller 1
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I2S1 pins (MCLK, BCLK, LRCK, DO, DI): PA9, PA14, PA15, PA16, PA17
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### mmc2
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Activates SD/MMC controller 2. To be used on boards with second SD slot, eMMC
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or tSD instead of NAND storage.
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MMC2 pins: PC6, PC7, PC8, PC9, PC10, PC11
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Parameters:
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param_mmc2_cd_pin (pin)
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SD/MMC 2 card detect pin
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Optional
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Default: PH0
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param_mmc2_non_removable (bool)
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Option for non-removable storage options on MMC 2 controller (eMMC or tSD)
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Optional
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Default: 0
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Set to 1 to use this option
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### nand
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Activates NAND controller
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This overlay should not be used until mainline MLC NAND support
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allows using NAND storage reliably
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### pps-gpio
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Activates pulse-per-second GPIO client
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Parameters:
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param_pps_pin (pin)
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Pin PPS source is connected to
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Optional
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Default: PI15
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param_pps_falling_edge (bool)
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Assert by falling edge
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Optional
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Default: 0
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When set (to 1), assert is indicated by a falling edge
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(instead of by a rising edge)
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### pwm
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Activates hardware PWM controller
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PWM pins (PWM0, PWM1): PB2, PI3
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Parameters:
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param_pwm_pins (string)
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PWM pins activated with this overlay
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Optional
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Default: both
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Supported values: 0, 1, both
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If set to 0 only PWM0 can be used,
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if set to 1 then only PWM1 can be used,
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if set to both (default), both PWM0 and PWM1 can be used
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### spdif-out
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Activates SPDIF/Toslink audio output
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SPDIF pin: PB13
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### spi0
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Activates SPI controller 0 to use it with other overlays and sets up the pin multiplexing for it
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SPI 0 pins (MOSI, MISO, SCK, CS0, CS1): PI12, PI13, PI11, PI10, PI14
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### spi1
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Activates SPI controller 1 to use it with other overlays and sets up the pin multiplexing for it
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SPI 1 pins (MOSI, MISO, SCK, CS0): PI18, PI19, PI17, PI16
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### spi2
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Activates SPI controller 2 to use it with other overlays and sets up the pin multiplexing for it
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SPI 2 pins a (MOSI, MISO, SCK, CS0): PC21, PC22, PC20, PC19
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SPI 2 pins b (MOSI, MISO, SCK, CS0): PB16, PB17, PB15, PB14
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Parameters:
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param_spi2_bus_pins (char)
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SPI bus 2 pinmux variant
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Optional
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Default: a
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Supported values: a, b
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Determines what pins SPI bus 2 is exposed on if SPI 2 is used
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### spi-add-cs1
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Activates SPI chip select 1 on SPI controller 0
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This overlay is required for using chip select 1 with other SPI overlays
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SPI 0 CS1 pin: PI14
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### spi-jedec-nor
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Activates MTD support for JEDEC compatible SPI NOR flash chips on SPI bus
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supported by the kernel SPI NOR driver
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SPI 0 pins (MOSI, MISO, SCK, CS0, CS1): PI12, PI13, PI11, PI10, PI14
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SPI 1 pins (MOSI, MISO, SCK, CS0): PI18, PI19, PI17, PI16
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SPI 2 pins a (MOSI, MISO, SCK, CS0): PC21, PC22, PC20, PC19
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SPI 2 pins b (MOSI, MISO, SCK, CS0): PB16, PB17, PB15, PB14
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Parameters:
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param_spinor_spi_bus (int)
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SPI bus to activate SPI NOR flash support on
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Required
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Supported values: 0, 1, 2
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param_spinor_spi_cs (int)
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SPI chip select number for SPI NOR connected to SPI bus 0
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Optional
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Default: 0
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Supported values: 0, 1
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Using chip select 1 on SPI 0 requires using "spi-add-cs1" overlay
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param_spinor_max_freq (int)
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Maximum SPI frequency
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Optional
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Default: 1000000
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Range: 3000 - 100000000
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### spi-spidev
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Activates SPIdev device node (/dev/spidevX.Y) for userspace SPI access,
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where X is the bus number and Y is the CS number
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SPI 0 pins (MOSI, MISO, SCK, CS0, CS1): PI12, PI13, PI11, PI10, PI14
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SPI 1 pins (MOSI, MISO, SCK, CS0): PI18, PI19, PI17, PI16
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SPI 2 pins a (MOSI, MISO, SCK, CS0): PC21, PC22, PC20, PC19
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SPI 2 pins b (MOSI, MISO, SCK, CS0): PB16, PB17, PB15, PB14
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Parameters:
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param_spidev_spi_bus (int)
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SPI bus to activate mcp2515 support on
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Required
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Supported values: 0, 1, 2
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param_spidev_spi_cs (int)
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SPI chip select number for SPIdev on SPI bus 0
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Optional
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Default: 0
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Supported values: 0, 1
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Using chip select 1 on SPI 0 requires using "spi-add-cs1" overlay
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param_spidev_max_freq (int)
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Maximum SPIdev frequency
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Optional
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Default: 1000000
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Range: 3000 - 100000000
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### uart2
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Activates serial port 2 (/dev/ttyS2)
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UART 2 pins (TX, RX, RTS, CTS): PI18, PI19, PI16, PI17
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Parameters:
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param_uart2_rtscts (bool)
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Enable RTS and CTS pins
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Optional
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Default: 0
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Set to 1 to enable CTS and RTS pins
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### uart3
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Activates serial port 3 (/dev/ttyS3)
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UART 3 pins a (TX, RX, RTS, CTS): PG6, PG7, PG8, PG9
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UART 3 pins b (TX, RX, RTS, CTS): PH0, PH1, PH2, PH3
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Parameters:
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param_uart3_pins (char)
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Determines what pins UART 3 is exposed on
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Optional
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Default: a
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Supported values: a, b
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param_uart3_rtscts (bool)
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Enable RTS and CTS pins
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Optional
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Default: 0
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Set to 1 to enable CTS and RTS pins
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### uart4
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Activates serial port 4 (/dev/ttyS4)
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UART 4 pins a (TX, RX): PG10, PG11
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UART 4 pins b (TX, RX): PH4, PH5
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Parameters:
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param_uart4_pins (char)
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Determines what pins UART 4 is exposed on
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Optional
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Default: a
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Supported values: a, b
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### uart 5
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Activates serial port 5 (/dev/ttyS5)
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UART 5 pins (TX, RX): PH6, PH7
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### uart 6
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Activates serial port 6 (/dev/ttyS6)
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UART 6 pins (TX, RX): PI12, PI13
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### uart 7
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Activates serial port 7 (/dev/ttyS7)
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UART 7 pins (TX, RX): PI20, PI21
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### w1-gpio
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Activates 1-Wire GPIO master
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Requires an external pull-up resistor on the data pin
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or enabling the internal pull-up
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Parameters:
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param_w1_pin (pin)
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Data pin for 1-Wire master
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Optional
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Default: PI15
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param_w1_pin_int_pullup (bool)
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Enable internal pull-up for the data pin
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Optional
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Default: 0
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Set to 1 to enable the pull-up
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This option should not be used with multiple sensors or long wires -
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please use external pull-up resistor instead
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