173 lines
3.2 KiB
Plaintext
173 lines
3.2 KiB
Plaintext
This document describes overlays provided in the kernel packages
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For generic Armbian overlays documentation please see
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https://docs.armbian.com/User-Guide_Armbian_overlays/
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### Platform:
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sun5i-a13 (Allwinner A13)
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### Platform details:
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I2C bus 0 is used for the AXP209 PMIC
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### Provided overlays:
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- analog-codec
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- i2c1
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- i2c2
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- nand
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- pwm
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- spi0
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- spi1
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- spi2
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- spi-jedec-nor
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- spi-spidev
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- uart0
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- uart1
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- uart2
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- uart3
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### Overlay details:
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### analog-codec
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Activates SoC analog codec driver that provides HP Out and Mic In
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functionality
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### i2c1
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Activates TWI/I2C bus 1
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I2C1 pins (SCL, SDA): PB15, PB16
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### i2c2
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Activates TWI/I2C bus 2
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I2C2 pins (SCL, SDA): PB17, PB18
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### nand
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Activates NAND controller
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This overlay should not be used until mainline MLC NAND support
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allows using NAND storage reliably
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### pwm
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Activates hardware PWM controller
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PWM pins (PWM0): PB2
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### spi0
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Activates SPI controller 0 to use it with other overlays and sets up the pin multiplexing for it
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SPI 0 pins (MOSI, MISO, SCK, CS0): PC0, PC1, PC2, PC3
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### spi1
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Activates SPI controller 1 to use it with other overlays and sets up the pin multiplexing for it
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SPI 1 pins (MOSI, MISO, SCK, CS0): PG11, PG12, PG10, PG9
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### spi2
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Activates SPI controller 2 to use it with other overlays and sets up the pin multiplexing for it
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SPI 2 pins (MOSI, MISO, SCK, CS0): PE2, PE3, PE1, PE0
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### spi-jedec-nor
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Activates MTD support for JEDEC compatible SPI NOR flash chips on SPI bus
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supported by the kernel SPI NOR driver
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SPI 0 pins (MOSI, MISO, SCK, CS0): PC0, PC1, PC2, PC3
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SPI 1 pins (MOSI, MISO, SCK, CS0): PG11, PG12, PG10, PG9
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SPI 2 pins (MOSI, MISO, SCK, CS0): PE2, PE3, PE1, PE0
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Parameters:
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param_spinor_spi_bus (int)
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SPI bus to activate SPI NOR flash support on
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Required
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Supported values: 0, 1, 2
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param_spinor_max_freq (int)
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Maximum SPI frequency
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Optional
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Default: 1000000
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Range: 3000 - 100000000
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### spi-spidev
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Activates SPIdev device node (/dev/spidevX.Y) for userspace SPI access,
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where X is the bus number and Y is the CS number
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SPI 0 pins (MOSI, MISO, SCK, CS0): PC0, PC1, PC2, PC3
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SPI 1 pins (MOSI, MISO, SCK, CS0): PG11, PG12, PG10, PG9
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SPI 2 pins (MOSI, MISO, SCK, CS0): PE2, PE3, PE1, PE0
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Parameters:
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param_spidev_spi_bus (int)
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SPI bus to activate mcp2515 support on
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Required
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Supported values: 0, 1, 2
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param_spidev_max_freq (int)
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Maximum SPIdev frequency
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Optional
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Default: 1000000
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Range: 3000 - 100000000
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### uart 0
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Activates serial port 0 (/dev/ttyS0)
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UART 0 pins (TX, RX): PF2, PF4
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### uart 1
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Activates serial port 1 (/dev/ttyS1)
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UART 1 pins a (TX, RX): PE10, PE11
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UART 1 pins b (TX, RX): PG3, PG4
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Parameters:
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param_uart1_pins (char)
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UART 1 pinmux variant
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Optional
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Default: a
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Supported values: a, b
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Determines what pins UART 1 is exposed on if UART 1 is used
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### uart2
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Activates serial port 2 (/dev/ttyS2)
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UART 2 pins (TX, RX, RTS, CTS): PD2, PD3, PD4, PD5
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Parameters:
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param_uart2_rtscts (bool)
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Enable RTS and CTS pins
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Optional
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Default: 0
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Set to 1 to enable CTS and RTS pins
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### uart3
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Activates serial port 3 (/dev/ttyS3)
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UART 3 pins (TX, RX, RTS, CTS): PG9, PG10, PG12, PG11
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Parameters:
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param_uart3_rtscts (bool)
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Enable RTS and CTS pins
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Optional
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Default: 0
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Set to 1 to enable CTS and RTS pins
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