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BPI-CM9-Linux/build/patch/kernel/archive/spacemit-6.6/dt/k1-musepi-pro.dts
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2023 Spacemit, Inc */
/dts-v1/;
#include "k1-x.dtsi"
#include "k1-x-efuse.dtsi"
#include "k1-x_pinctrl.dtsi"
#include "lcd_tc358762xbg_dpi_800x480.dtsi"
#include "k1-x-hdmi.dtsi"
#include "k1-x-lcd.dtsi"
#include "k1-x-camera-sdk.dtsi"
#include "k1-x_opp_table.dtsi"
#include "k1-x_thermal_cooling.dtsi"
/ {
model = "SpacemiT MusePi Pro";
modules_usrload = "8852bs";
chosen {
bootargs = "earlycon=sbi console=ttyS0,115200n8 swiotlb=65536 rdinit=/init";
stdout-path = "serial0:115200n8";
};
cpus: cpus {
#address-cells = <1>;
#size-cells = <0>;
timebase-frequency = <24000000>;
cpu_0: cpu@0 {
reg = <0>;
cpu-ai = "true";
};
cpu_1: cpu@1 {
reg = <1>;
cpu-ai = "true";
};
cpu_2: cpu@2 {
reg = <2>;
cpu-ai = "true";
};
cpu_3: cpu@3 {
reg = <3>;
cpu-ai = "true";
};
cpu-map {
cluster0 {
core0 {
cpu = <&cpu_0>;
};
core1 {
cpu = <&cpu_1>;
};
core2 {
cpu = <&cpu_2>;
};
core3 {
cpu = <&cpu_3>;
};
};
cluster1 {
core0 {
cpu = <&cpu_4>;
};
core1 {
cpu = <&cpu_5>;
};
core2 {
cpu = <&cpu_6>;
};
core3 {
cpu = <&cpu_7>;
};
};
};
};
dc_12v: dc-12v {
compatible = "regulator-fixed";
regulator-name = "dc_12v";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
};
leds {
compatible = "gpio-leds";
led1 {
label = "sys-led";
gpios = <&gpio 96 0>;
linux,default-trigger = "heartbeat";
default-state = "on";
status = "okay";
};
};
memory@0 {
device_type = "memory";
reg = <0x0 0x00000000 0x0 0x80000000>;
};
memory@100000000 {
device_type = "memory";
reg = <0x1 0x00000000 0x0 0x80000000>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
linux,cma {
compatible = "shared-dma-pool";
/* alloc memory from 0x40000000~0x70000000 */
alloc-ranges = <0 0x40000000 0 0x30000000>;
/* size of cma buffer is 384MByte */
size = <0 0x18000000>;
/* start address is 1Mbyte aligned */
alignment = <0x0 0x100000>;
linux,cma-default;
/* besides hardware, dma for ex. buffer can be used by memory management */
reusable;
};
/* reserved 384K for dpu, including mmu table(256K) and cmdlist(128K) */
dpu_resv: dpu_reserved@2ff40000 {
compatible = "shared-dma-pool";
reg = <0x0 0x2ff40000 0x0 0x000C0000>;
no-map;
};
};
rf_pwrseq: rf-pwrseq {
compatible = "spacemit,rf-pwrseq";
//vdd-supply = <&ldo_7>;
//vdd_voltage = <3300000>;
io-supply = <&dcdc_3>;
io_voltage = <1800000>;
pwr-gpios = <&gpio 67 0>;
status = "okay";
wlan_pwrseq: wlan-pwrseq {
compatible = "spacemit,wlan-pwrseq";
regon-gpios = <&gpio 116 0>;
interrupt-parent = <&pinctrl>;
interrupts = <268>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wlan_wakeup>;
};
bt_pwrseq: bt-pwrseq {
compatible = "spacemit,bt-pwrseq";
reset-gpios = <&gpio 63 GPIO_ACTIVE_HIGH>;
};
};
vcc4v0_baseboard: vcc4v0-baseboard {
compatible = "regulator-fixed";
regulator-name = "vcc4v0_baseboard";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <4000000>;
regulator-max-microvolt = <4000000>;
vin-supply = <&dc_12v>;
};
};
/* MIPI CSI1, clk lane1 */
&backsensor {
pwdn-gpios = <&gpio 113 0>;
dvdd-powen-gpios = <&gpio 115 0>;
mclk-disable;
status = "okay";
};
/* MIPI CSI3 data line2,3 clk lane2 */
&backsensor_aux {
af_2v8-supply = <&ldo_3>;
avdd_2v8-supply = <&ldo_2>;
dovdd_1v8-supply = <&ldo_7>;
dvdd_1v2-supply = <&ldo_6>;
pwdn-gpios = <&gpio 124 0>;
reset-gpios = <&gpio 97 0>;
pinmulti-enable;
twsi-index = <0>;
clocks = <&ccu CLK_CAMM0>;
clock-names = "cam_mclk0";
pinctrl-names = "mclk_multi";
pinctrl-0 = <&pinctrl_camera0>;
status = "disabled";
};
&ccic0 {
power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>;
status = "okay";
};
&ccic1 {
power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>;
status = "okay";
};
&ccic2 {
power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>;
status = "okay";
};
&combphy {
status = "okay";
};
&cpp {
power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>;
};
&csiphy0 {
status = "okay";
};
&csiphy1 {
status = "disabled";
};
&csiphy2 {
spacemit,bifmode-enable;
status = "okay";
};
&dpu_online2_dsi {
memory-region = <&dpu_resv>;
spacemit-dpu-bitclk = <700000000>;
spacemit-dpu-escclk = <76800000>;
dsi_1v2-supply = <&ldo_5>;
vin-supply-names = "dsi_1v2";
status = "disabled";
};
&dsi2 {
status = "disabled";
force-attached = "lcd_tc358762xbg_dpi_800x480";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
dsi1_output: endpoint@1 {
reg = <1>;
remote-endpoint = <&panel_in>;
};
};
};
dpi_panel: panel@0 {
status = "ok"
compatible = "raspberrypi,dpi-panel";
};
};
&dpu_online2_hdmi {
memory-region = <&dpu_resv>;
status = "okay";
};
&ehci {
spacemit,reset-on-resume;
spacemit,udc-mode = <MV_USB_MODE_OTG>;
status = "disabled";
};
&ehci1 {
spacemit,udc-mode = <MV_USB_MODE_HOST>;
spacemit,reset-on-resume;
status = "okay";
};
&eth0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gmac0>;
emac,reset-gpio = <&gpio 110 0>;
emac,reset-active-low;
emac,reset-delays-us = <0 10000 100000>;
/* store forward mode */
tx-threshold = <1518>;
rx-threshold = <12>;
tx-ring-num = <1024>;
rx-ring-num = <1024>;
dma-burst-len = <5>;
ref-clock-from-phy;
clk-tuning-enable;
clk-tuning-by-delayline;
tx-phase = <60>;
rx-phase = <73>;
nvmem-cells = <&mac_address0>;
nvmem-cell-names = "mac-address";
phy-handle = <&rgmii0>;
status = "okay";
mdio-bus {
#address-cells = <0x1>;
#size-cells = <0x0>;
rgmii0: phy@1 {
compatible = "ethernet-phy-id001c.c916";
device_type = "ethernet-phy";
reg = <0x1>;
phy-mode = "rgmii";
leds {
#address-cells = <1>;
#size-cells = <0>;
lan0-led1@1 {
reg = <1>;
linux,default-trigger = "netdev";
};
lan0-led2@2 {
reg = <2>;
linux,default-trigger = "netdev";
};
};
};
};
};
/* MIPI CSI3 data line0,1 clk lane3 */
&frontsensor {
pwdn-gpios = <&gpio 114 0>;
dvdd-powen-gpios = <&gpio 115 0>;
twsi-index = <1>;
//mclk can disable
mclk-disable;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_camera1>;
status = "okay";
};
&gpio{
gpio-ranges = <
&pinctrl 49 GPIO_49 2
&pinctrl 58 GPIO_58 1
&pinctrl 63 GPIO_63 1
&pinctrl 65 GPIO_65 1
&pinctrl 67 GPIO_67 1
&pinctrl 70 PRI_TDI 4
&pinctrl 74 GPIO_74 1
&pinctrl 79 GPIO_79 1
&pinctrl 80 GPIO_80 4
&pinctrl 90 GPIO_90 3
&pinctrl 96 DVL0 2
&pinctrl 110 GPIO_110 1
&pinctrl 111 GPIO_111 1
&pinctrl 113 GPIO_113 1
&pinctrl 114 GPIO_114 3
&pinctrl 118 GPIO_118 1
&pinctrl 123 GPIO_123 5
>;
};
&hdmi{
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hdmi_0>;
status = "okay";
};
&hdmiaudio {
status = "okay";
};
&lcds {
status = "disabled";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c0>;
spacemit,i2c-fast-mode;
status = "okay";
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
spacemit,i2c-fast-mode;
status = "okay";
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_0>;
spacemit,i2c-fast-mode;
status = "okay";
eeprom@50{
compatible = "atmel,24c02";
reg = <0x50>;
#address-cells = <1>;
#size-cells = <1>;
power-domains = <&power K1X_PMU_DUMMY_PWR_DOMAIN>;
status = "disabled";
mac_address0: mac_address0@0 {
reg = <0x0 6>;
};
mac_address1: mac_address1@6 {
reg = <0x6 6>;
};
};
es8326: es8326@19{
compatible = "everest,es8326";
reg = <0x19>;
#sound-dai-cells = <0>;
interrupt-parent = <&gpio>;
interrupts = <126 1>;
everest,mic1-src = [44];
everest,mic2-src = [66];
status = "okay";
};
};
&i2c3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3_0>;
status = "okay";
};
&i2c4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c4_0>;
status = "okay";
};
&i2c5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c5_0>;
status = "disabled";
raspits-panel@45 {
status = "okay";
compatible = "raspberrypi,7inch-touchscreen-panel";
reg = <0x45>;
enable-gpio = <&gpio 83 0>;
port {
panel_in: endpoint {
remote-endpoint = <&dsi1_output>;
};
};
};
raspits-touch-ft5426@38 {
status = "okay";
compatible = "raspits_ft5426";
reg = <0x38>;
};
};
&i2c6 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c6_2>;
status = "disabled";
gt9xx@5d {
compatible = "goodix,gt9xx";
reg = <0x5d>;
reset-gpios = <&gpio 114 GPIO_ACTIVE_HIGH>;
irq-gpios = <&gpio 58 GPIO_ACTIVE_HIGH>;
irq-flags = <2>;
touchscreen-max-id = <11>;
touchscreen-size-x = <1200>;
touchscreen-size-y = <1920>;
touchscreen-max-w = <512>;
touchscreen-max-p = <512>;
goodix,int-sync = <1>;
status = "disabled";
};
};
&i2c7 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c7>;
status = "disabled";
};
&i2c8 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c8>;
status = "okay";
spm8821@41 {
compatible = "spacemit,spm8821";
reg = <0x41>;
interrupt-parent = <&intc>;
interrupts = <64>;
status = "okay";
vcc_sys-supply = <&vcc4v0_baseboard>;
dcdc5-supply = <&dcdc_5>;
regulators {
compatible = "pmic,regulator,spm8821";
/* buck */
dcdc_1: DCDC_REG1 {
regulator-name = "dcdc1";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3450000>;
regulator-ramp-delay = <5000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <650000>;
};
};
dcdc_2: DCDC_REG2 {
regulator-name = "dcdc2";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3450000>;
regulator-ramp-delay = <5000>;
regulator-always-on;
};
dcdc_3: DCDC_REG3 {
regulator-name = "dcdc3";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1800000>;
regulator-ramp-delay = <5000>;
regulator-always-on;
};
dcdc_4: DCDC_REG4 {
regulator-name = "dcdc4";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3300000>;
regulator-ramp-delay = <5000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
dcdc_5: DCDC_REG5 {
regulator-name = "dcdc5";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3450000>;
regulator-ramp-delay = <5000>;
regulator-always-on;
};
dcdc_6: DCDC_REG6 {
regulator-name = "dcdc6";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3450000>;
regulator-ramp-delay = <5000>;
regulator-always-on;
};
/* aldo */
ldo_1: LDO_REG1 {
regulator-name = "ldo1";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3400000>;
regulator-boot-on;
/* set the min voltage means will disable this vol in suspend for ldo */
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <500000>;
};
};
ldo_2: LDO_REG2 {
regulator-name = "ldo2";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3400000>;
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <500000>;
};
};
ldo_3: LDO_REG3 {
regulator-name = "ldo3";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3400000>;
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <500000>;
};
};
ldo_4: LDO_REG4 {
regulator-name = "ldo4";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3400000>;
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <500000>;
};
};
/* dldo */
ldo_5: LDO_REG5 {
regulator-name = "ldo5";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3400000>;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <500000>;
};
};
ldo_6: LDO_REG6 {
regulator-name = "ldo6";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3400000>;
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <500000>;
};
};
ldo_7: LDO_REG7 {
regulator-name = "ldo7";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3400000>;
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <500000>;
};
};
ldo_8: LDO_REG8 {
regulator-name = "ldo8";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3400000>;
regulator-always-on;
};
ldo_9: LDO_REG9 {
regulator-name = "ldo9";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3400000>;
};
ldo_10: LDO_REG10 {
regulator-name = "ldo10";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3400000>;
regulator-always-on;
};
ldo_11: LDO_REG11 {
regulator-name = "ldo11";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3400000>;
};
sw_1: SWITCH_REG1 {
regulator-name = "switch1";
};
};
pmic_pinctrl: pinctrl {
compatible = "pmic,pinctrl,spm8821";
gpio-controller;
#gpio-cells = <2>;
spacemit,npins = <6>;
/**
* led_pins: led-pins {
* pins = "PIN3";
* function = "sleep";
* bias-disable = <0>;
* drive-open-drain = <0x1>;
* };
*/
};
pwr_key: key {
compatible = "pmic,pwrkey,spm8821";
};
ext_rtc: rtc {
compatible = "pmic,rtc,spm8821";
};
ext_adc: adc {
compatible = "pmic,adc,spm8821";
};
};
};
&pcie1_rc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie1_3>;
status = "okay";
};
&pcie2_rc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie2_5>;
status = "okay";
};
&imggpu {
status = "okay";
};
&i2s0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sspa0_2>;
status = "okay";
};
&isp {
power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>;
};
&otg {
usb-role-switch;
role-switch-user-control;
spacemit,reset-on-resume;
role-switch-default-mode = "peripheral";
vbus-gpios = <&gpio 123 0>;
status = "disabled";
};
&otg1 {
usb-role-switch;
role-switch-user-control;
spacemit,reset-on-resume;
role-switch-default-mode = "host";
vbus-gpios = <&gpio 123 0>;
status = "disabled";
};
&pinctrl {
pinctrl-single,gpio-range = <
&range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_58 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_63 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_64 1 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_65 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_67 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range PRI_TDI 2 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range PRI_TCK 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDO 1 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_74 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_79 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_80 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_81 3 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_90 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_91 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range DVL0 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range DVL1 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS0)
&range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_111 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_113 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_115 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_116 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_118 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS0)
&range GPIO_124 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
>;
pinctrl_rcpu: pinctrl_rcpu_grp {
pinctrl-single,pins = <
K1X_PADCONF(GPIO_47, MUX_MODE1, (EDGE_NONE | PULL_UP | PAD_3V_DS4)) /* r_uart0_tx */
K1X_PADCONF(GPIO_48, MUX_MODE1, (EDGE_NONE | PULL_UP | PAD_3V_DS4)) /* r_uart0_rx */
>;
};
pinctrl_rpwm7_0: rpwm7_0_grp {
pinctrl-single,pins = <
K1X_PADCONF(GPIO_52, MUX_MODE3, (EDGE_NONE | PULL_UP | PAD_3V_DS4)) /* rcpu_pwm7 */
>;
};
pinctrl_gmac0: gmac0_grp {
pinctrl-single,pins =<
K1X_PADCONF(GPIO_00, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rxdv */
K1X_PADCONF(GPIO_01, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rx_d0 */
K1X_PADCONF(GPIO_02, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rx_d1 */
K1X_PADCONF(GPIO_03, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rx_clk */
K1X_PADCONF(GPIO_04, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rx_d2 */
K1X_PADCONF(GPIO_05, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rx_d3 */
K1X_PADCONF(GPIO_06, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx_d0 */
K1X_PADCONF(GPIO_07, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx_d1 */
K1X_PADCONF(GPIO_08, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx */
K1X_PADCONF(GPIO_09, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx_d2 */
K1X_PADCONF(GPIO_10, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx_d3 */
K1X_PADCONF(GPIO_11, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx_en */
K1X_PADCONF(GPIO_12, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac0_mdc */
K1X_PADCONF(GPIO_13, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac0_mdio */
K1X_PADCONF(GPIO_14, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_int_n */
K1X_PADCONF(GPIO_45, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_clk_ref */
>;
};
pinctrl_gmac1: gmac1_grp {
pinctrl-single,pins =<
K1X_PADCONF(GPIO_29, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_rxdv */
K1X_PADCONF(GPIO_30, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_rx_d0 */
K1X_PADCONF(GPIO_31, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_rx_d1 */
K1X_PADCONF(GPIO_32, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_rx_clk */
K1X_PADCONF(GPIO_33, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_rx_d2 */
K1X_PADCONF(GPIO_34, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_rx_d3 */
K1X_PADCONF(GPIO_35, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_tx_d0 */
K1X_PADCONF(GPIO_36, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_tx_d1 */
K1X_PADCONF(GPIO_37, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_tx */
K1X_PADCONF(GPIO_38, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_tx_d2 */
K1X_PADCONF(GPIO_39, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_tx_d3 */
K1X_PADCONF(GPIO_40, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_tx_en */
K1X_PADCONF(GPIO_41, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_mdc */
K1X_PADCONF(GPIO_42, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_mdio */
K1X_PADCONF(GPIO_43, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_int_n */
K1X_PADCONF(GPIO_46, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_clk_ref */
>;
};
pinctrl_wlan_wakeup: wlan_wakeup_grp {
pinctrl-single,pins =<
K1X_PADCONF(GPIO_66, MUX_MODE0, (EDGE_FALL | PULL_DOWN | PAD_3V_DS2)) /* wifi edge detect */
>;
};
pinctrl_sspa0_2: sspa0_2_grp {
pinctrl-single,pins =<
K1X_PADCONF(GPIO_111, MUX_MODE2, (EDGE_NONE | PULL_UP | PAD_1V8_DS0)) /* sspa0_clk */
K1X_PADCONF(GPIO_112, MUX_MODE2, (EDGE_NONE | PULL_UP | PAD_1V8_DS0)) /* sspa0_frm */
K1X_PADCONF(GPIO_120, MUX_MODE3, (EDGE_NONE | PULL_UP | PAD_1V8_DS0)) /* sspa0_txd */
K1X_PADCONF(GPIO_121, MUX_MODE3, (EDGE_NONE | PULL_UP | PAD_1V8_DS0)) /* sspa0_rxd */
K1X_PADCONF(GPIO_122, MUX_MODE3, (EDGE_NONE | PULL_UP | PAD_1V8_DS0)) /* sspa0_sysclk */
>;
};
pinctrl_pcie2_5: pcie2_5_grp {
pinctrl-single,pins =<
K1X_PADCONF(GPIO_62, MUX_MODE4, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* PCIe2_perstn */
K1X_PADCONF(GPIO_36, MUX_MODE4, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* PCIe2_waken */
K1X_PADCONF(GPIO_117, MUX_MODE4, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* PCIe2_clkreqn */
>;
};
};
&pwm_bl {
pwms = <&pwm14 2000>;
brightness-levels = <
0 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40
40 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40
40 40 40 40 40 40 40 40 40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255
>;
default-brightness-level = <100>;
status = "okay";
};
&pwm4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm4_1>;
status = "okay";
};
&pwm14 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm14_1>;
status = "disabled";
};
&qspi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi>;
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <26500000>;
m25p,fast-read;
broken-flash-reset;
status = "okay";
};
};
&rcpu {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rcpu>;
mboxes = <&mailbox 0>, <&mailbox 1>;
mbox-names = "vq0", "vq1";
memory-region = <&rcpu_mem_0>, <&rcpu_mem_heap>, <&vdev0vring0>, <&vdev0vring1>, <&vdev0buffer>, <&rsc_table>, <&rcpu_mem_snapshots>;
status = "okay";
};
&rpwm7 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rpwm7_0>;
status = "okay";
};
/* &r_uart0 {
status = "okay";
};
*/
/* SD */
&sdhci0 {
pinctrl-names = "default","fast";
pinctrl-0 = <&pinctrl_mmc1>;
pinctrl-1 = <&pinctrl_mmc1_fast>;
bus-width = <4>;
cd-gpios = <&gpio 80 0>;
vmmc-supply = <&dcdc_4>;
vqmmc-supply = <&ldo_1>;
no-mmc;
no-sdio;
spacemit,sdh-host-caps-disable = <(
MMC_CAP_UHS_SDR12 |
MMC_CAP_UHS_SDR25
)>;
spacemit,sdh-quirks = <(
SDHCI_QUIRK_BROKEN_CARD_DETECTION |
SDHCI_QUIRK_INVERTED_WRITE_PROTECT |
SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
)>;
spacemit,sdh-quirks2 = <(
SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
SDHCI_QUIRK2_BROKEN_PHY_MODULE |
SDHCI_QUIRK2_SET_AIB_MMC
)>;
spacemit,aib_mmc1_io_reg = <0xD401E81C>;
spacemit,apbc_asfar_reg = <0xD4015050>;
spacemit,apbc_assar_reg = <0xD4015054>;
spacemit,rx_dline_reg = <0x0>;
spacemit,tx_dline_reg = <0x0>;
spacemit,tx_delaycode = <0x9f>;
spacemit,rx_tuning_limit = <50>;
spacemit,sdh-freq = <204800000>;
status = "okay";
};
/* SDIO */
&sdhci1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc2>;
bus-width = <4>;
non-removable;
vqmmc-supply = <&dcdc_3>;
no-mmc;
no-sd;
keep-power-in-suspend;
/* bcmdhd use private oob solution rather than dat1/standard wakeup */
/delete-property/ enable-sdio-wakeup;
spacemit,sdh-host-caps-disable = <(
MMC_CAP_UHS_DDR50 |
MMC_CAP_NEEDS_POLL
)>;
spacemit,sdh-quirks = <(
SDHCI_QUIRK_BROKEN_CARD_DETECTION |
SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
)>;
spacemit,sdh-quirks2 = <(
SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
SDHCI_QUIRK2_BROKEN_PHY_MODULE
)>;
spacemit,rx_dline_reg = <0x0>;
spacemit,tx_delaycode = <0xa8 0x78>;
spacemit,rx_tuning_limit = <50>;
spacemit,sdh-freq = <375000000>;
status = "okay";
};
/* eMMC */
&sdhci2 {
bus-width = <8>;
non-removable;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
no-sd;
no-sdio;
spacemit,sdh-quirks = <(
SDHCI_QUIRK_BROKEN_CARD_DETECTION |
SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
)>;
spacemit,sdh-quirks2 = <(
SDHCI_QUIRK2_PRESET_VALUE_BROKEN
)>;
spacemit,sdh-freq = <375000000>;
status = "okay";
};
&sound_hdmi {
status = "okay";
simple-audio-card,cpu {
sound-dai = <&hdmiaudio>;
};
};
&sound_codec {
status = "okay";
simple-audio-card,name = "snd-es8326";
spacemit,mclk-fs = <64>;
simple-audio-card,codec {
sound-dai = <&es8326>;
};
};
&spi3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssp3_0>;
k1x,ssp-disable-dma;
status = "okay";
k1x,ssp-clock-rate = <25600000>;
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0_2>;
status = "okay";
};
/* Bluetooth */
&uart2 {
status = "okay";
pinctrl-0 = <&pinctrl_uart2>;
pinctrl-names = "default";
uart-has-rtscts;
bluetooth {
compatible = "realtek,rtl8723ds-bt";
device-wake-gpios = <&gpio 64 GPIO_ACTIVE_HIGH>;
enable-gpios = <&gpio 65 GPIO_ACTIVE_HIGH>;
};
};
&udc {
spacemit,udc-mode = <MV_USB_MODE_UDC>;
status = "okay";
};
&udc1 {
spacemit,udc-mode = <MV_USB_MODE_OTG>;
status = "disabled";
};
&usb2phy {
status = "okay";
};
&usb3hub {
hub-gpios = <
&gpio 127 0 /* usb3 hub en */
&gpio 123 0>; /* usb3 hub rst*/
vbus-gpios = <&gpio 79 0>; /* usb3 hub output vbus */
vbus_delay_ms = <200>;
status = "okay";
};
&usbdrd3 {
status = "okay";
reset-on-resume;
dwc3@c0a00000 {
dr_mode = "host";
phy_type = "utmi";
snps,hsphy_interface = "utmi";
snps,dis_enblslpm_quirk;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
snps,dis-tx-ipgap-linecheck-quirk;
snps,parkmode-disable-ss-quirk;
};
};
&usbphy {
status = "okay";
};
&usbphy1 {
status = "okay";
};
&vi {
power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>;
};
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