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/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/rockchip.h>
/*
* gpio configuration for R29_MXQ boards
*
*/
&{/gpio-leds} {
working {
gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "none";
pinctrl-0 = <&gpio_led_working>;
};
auxiliary {
gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
label = "auxiliary";
linux,default-trigger = "mmc2";
default-state = "off";
pinctrl-names = "default";
pinctrl-0 = <&gpio_led_auxiliary>;
};
};
&{/pinctrl/gpio-items} {
gpio_led_working: gpio-led-working {
rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
};
gpio_led_auxiliary: gpio-led-auxiliary {
rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
gpio_led_ethlink: gpio-led-ethlink{
rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
gpio_led_ethled: gpio-led-ethled{
rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
reset_key: reset-key {
rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
&gpio_keys {
pinctrl-names = "default";
pinctrl-0 = <&reset_key>;
reset {
gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>;
label = "reset";
linux,code = <KEY_RESTART>;
debounce-interval = <200>;
wakeup-source;
};
};
&emmc {
rockchip,default-sample-phase = <112>;
bus-width = <8>;
clock-frequency = <125000000>;
max-frequency = <125000000>;
};
&vdd_arm {
compatible = "regulator-fixed";
regulator-name = "vdd_arm";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vcc_sys>;
};
&vdd_log {
compatible = "regulator-fixed";
regulator-name = "vdd_log";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vcc_sys>;
};
/*
* R29, R2B ad H20 boards require a GPIO to be turned low to enable HDMI output, we simulate it
* here as a regulator that must be always on.
* Also these boards don't have the necessary power regulators for CPU and Logic.
* R29 and R2B have a single power regulator fixed to 1.2v, hence the CPU can't go over 1.0 ghz
*/
&{/} {
vdd_hdmi_phy: vdd-hdmi-phy-regulator {
compatible = "regulator-fixed";
gpio = <&gpio2 RK_PB3 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&hdmi_phy_enable>;
regulator-name = "vdd-hdmi-phy";
regulator-always-on;
regulator-boot-on;
vin-supply = <&vcc_sys>;
};
cpu_opp_table_r29: cpu-opp-table-r29 {
compatible = "operating-points-v2";
opp-shared;
opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1200000>;
clock-latency-ns = <40000>;
opp-suspend;
};
opp-816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <1200000>;
};
opp-1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <1200000>;
};
};
};
&pinctrl {
hdmi-phy {
hdmi_phy_enable: hdmi-phy-enable {
rockchip,pins = <2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&pwm1 {
status = "disabled";
};
&pwm2 {
status = "disabled";
};
&cpu0 {
operating-points-v2 = <&cpu_opp_table_r29>;
};
&cpu1 {
operating-points-v2 = <&cpu_opp_table_r29>;
};
&cpu2 {
operating-points-v2 = <&cpu_opp_table_r29>;
};
&cpu3 {
operating-points-v2 = <&cpu_opp_table_r29>;
};