20 lines
515 B
C
20 lines
515 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2015 Stefan Roese <[email protected]>
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*/
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#ifndef __CONFIG_SOCFPGA_SR1500_H__
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#define __CONFIG_SOCFPGA_SR1500_H__
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#include <asm/arch/base_addr_ac5.h>
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/* Memory configurations */
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#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SR1500 */
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/* Ethernet on SoC (EMAC) */
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/* The PHY is autodetected, so no MII PHY address is needed here */
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/* The rest of the configuration is shared */
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#include <configs/socfpga_common.h>
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#endif /* __CONFIG_SOCFPGA_SR1500_H__ */
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