28 lines
520 B
C
28 lines
520 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (c) 2014-2016 Marcel Ziswiler
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*
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* Configuration settings for the Toradex Apalis T30 modules.
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <linux/sizes.h>
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#include "tegra30-common.h"
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/*
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* Board-specific serial config
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*
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* Apalis UART1: NVIDIA UARTA
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* Apalis UART2: NVIDIA UARTD
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* Apalis UART3: NVIDIA UARTB
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* Apalis UART4: NVIDIA UARTC
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*/
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#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
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#include "tegra-common-post.h"
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#endif /* __CONFIG_H */
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