99 lines
3.0 KiB
C
99 lines
3.0 KiB
C
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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/*
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* Copyright (c) 2023 Amlogic, Inc. All rights reserved.
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*/
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#define MESON_CPU_MAJOR_ID_M6 0x16
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#define MESON_CPU_MAJOR_ID_M6TV 0x17
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#define MESON_CPU_MAJOR_ID_M6TVL 0x18
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#define MESON_CPU_MAJOR_ID_M8 0x19
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#define MESON_CPU_MAJOR_ID_MTVD 0x1A
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#define MESON_CPU_MAJOR_ID_M8B 0x1B
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#define MESON_CPU_MAJOR_ID_MG9TV 0x1C
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#define MESON_CPU_MAJOR_ID_M8M2 0x1D
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#define MESON_CPU_MAJOR_ID_GXBB 0x1F
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#define MESON_CPU_MAJOR_ID_GXTVBB 0x20
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#define MESON_CPU_MAJOR_ID_GXL 0x21
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#define MESON_CPU_MAJOR_ID_GXM 0x22
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#define MESON_CPU_MAJOR_ID_TXL 0x23
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#define MESON_CPU_MAJOR_ID_TXLX 0x24
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#define MESON_CPU_MAJOR_ID_AXG 0x25
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#define MESON_CPU_MAJOR_ID_GXLX 0x26
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#define MESON_CPU_MAJOR_ID_TXHD 0x27
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#define MESON_CPU_MAJOR_ID_G12A 0x28
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#define MESON_CPU_MAJOR_ID_G12B 0x29
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#define MESON_CPU_MAJOR_ID_SM1 0x2B
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#define MESON_CPU_MAJOR_ID_A1 0x2C
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#define MESON_CPU_MAJOR_ID_TL1 0x2E
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#define MESON_CPU_MAJOR_ID_TM2 0x2F
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#define MESON_CPU_MAJOR_ID_C1 0x30
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#define MESON_CPU_MAJOR_ID_SC2 0x32
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#define MESON_CPU_MAJOR_ID_C2 0x33
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#define MESON_CPU_MAJOR_ID_T5 0x34
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#define MESON_CPU_MAJOR_ID_T5D 0x35
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#define MESON_CPU_MAJOR_ID_T7 0x36
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#define MESON_CPU_MAJOR_ID_S4 0x37
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#define MESON_CPU_MAJOR_ID_T3 0x38
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#define MESON_CPU_MAJOR_ID_P1 0x39
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#define MESON_CPU_MAJOR_ID_S4D 0x3A
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#define MESON_CPU_MAJOR_ID_T5W 0x3B
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#define MESON_CPU_MAJOR_ID_C3 0x3D
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#define MESON_CPU_MAJOR_ID_S5 0x3E
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#define MESON_CPU_MAJOR_ID_A4 0x40
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#define MESON_CPU_MAJOR_ID_T5M 0x41
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#define MESON_CPU_MAJOR_ID_T3X 0x42
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#define MESON_CPU_MAJOR_ID_T6W 0x43
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#define MESON_CPU_MAJOR_ID_TXHD2 0x44
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#define MESON_CPU_MAJOR_ID_S1A 0x45
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#define MESON_CPU_MAJOR_ID_S7 0x46
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#define MESON_CPU_MAJOR_ID_S7D 0x47
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#define MESON_CPU_MAJOR_ID_S6 0x48
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#define MESON_CPU_MAJOR_ID_T6D 0x49
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#define MESON_CPU_MAJOR_ID_T6W 0x43
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#define MESON_CPU_MAJOR_ID_T6X 0x4B
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#define MESON_CPU_MAJOR_ID_A9 0x4D
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#define MESON_CPU_MAJOR_ID_C5 0x4F
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#define MESON_CPU_PACKAGE_ID_905D 0X00
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#define MESON_CPU_PACKAGE_ID_905M 0x20
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#define MESON_CPU_PACKAGE_ID_905X 0X80
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#define MESON_CPU_PACKAGE_ID_905L 0XC0
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#define MESON_CPU_PACKAGE_ID_905M2 0XE0
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#define MESON_CPU_PACKAGE_ID_T962X 0x10
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#define MESON_CPU_PACKAGE_ID_T962E 0x20
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#define MESON_CPU_PACKAGE_ID_A113X 0x37
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#define MESON_CPU_PACKAGE_ID_A113D 0xD0
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#define MESON_CPU_CHIP_REVISION_A 0xA
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#define MESON_CPU_CHIP_REVISION_B 0xB
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#define MESON_CPU_CHIP_REVISION_C 0xC
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#define MESON_CPU_CHIP_REVISION_D 0xD
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typedef struct cpu_id {
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unsigned int family_id:8;
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unsigned int package_id:8;
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unsigned int chip_rev:8; //RevA/RevB etc.
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unsigned int reserve:4;
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unsigned int layout_ver:4;
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} cpu_id_t;
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typedef struct chip_id {
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unsigned int version;
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unsigned char chipid[16];
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} chip_id_t;
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cpu_id_t get_cpu_id(void);
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extern chip_id_t aml_chip_id;
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int get_chip_id(unsigned char *buff, unsigned int size);
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/**
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* TODO: Remove this API after move static system information to RO
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* register or SRAM
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*
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* Should *NOT* call this API directly, always use get_chip_id()
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*/
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int __get_chip_id(unsigned char *buff, unsigned int size);
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