277 lines
7.6 KiB
C
277 lines
7.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Based on acpi.c from coreboot
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*
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* Copyright (C) 2024 9elements GmbH
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*/
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#define LOG_CATEGORY LOGC_ACPI
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#include <bloblist.h>
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#include <cpu_func.h>
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#include <efi_loader.h>
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#include <malloc.h>
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#include <string.h>
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#include <tables_csum.h>
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#include <acpi/acpigen.h>
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#include <acpi/acpi_device.h>
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#include <acpi/acpi_table.h>
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#include <asm-generic/io.h>
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#include <dm/acpi.h>
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#include <dm/uclass.h>
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#include <linux/log2.h>
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#include <linux/sizes.h>
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/* defined in assembly file */
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/**
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* acpi_pp_code_size - Spinloop code size *
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*/
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extern u16 acpi_pp_code_size;
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/**
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* acpi_pp_tables - Start of ACPI PP tables.
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*/
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extern ulong acpi_pp_tables;
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/**
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* acpi_pp_etables - End of ACPI PP tables.
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*/
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extern ulong acpi_pp_etables;
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/**
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* acpi_pp_code_start() - Spinloop code
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*
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* Architectural spinloop code to be installed in each parking protocol
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* page. The spinloop code must be less than 2048 bytes.
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*
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* The spinloop code will be entered after calling
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* acpi_parking_protocol_install().
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*
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*/
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void acpi_pp_code_start(void);
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void acpi_write_madt_gicc(struct acpi_madt_gicc *gicc, uint cpu_num,
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uint perf_gsiv, ulong phys_base, ulong gicv,
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ulong gich, uint vgic_maint_irq, u64 gicr_base,
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ulong mpidr, uint efficiency)
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{
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memset(gicc, '\0', sizeof(struct acpi_madt_gicc));
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gicc->type = ACPI_APIC_GICC;
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gicc->length = sizeof(struct acpi_madt_gicc);
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gicc->cpu_if_num = cpu_num;
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gicc->processor_id = cpu_num;
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gicc->flags = ACPI_MADTF_ENABLED;
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gicc->perf_gsiv = perf_gsiv;
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gicc->phys_base = phys_base;
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gicc->gicv = gicv;
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gicc->gich = gich;
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gicc->vgic_maint_irq = vgic_maint_irq;
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gicc->gicr_base = gicr_base;
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gicc->mpidr = mpidr;
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gicc->efficiency = efficiency;
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}
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void acpi_write_madt_gicd(struct acpi_madt_gicd *gicd, uint gic_id,
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ulong phys_base, uint gic_version)
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{
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memset(gicd, '\0', sizeof(struct acpi_madt_gicd));
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gicd->type = ACPI_APIC_GICD;
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gicd->length = sizeof(struct acpi_madt_gicd);
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gicd->gic_id = gic_id;
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gicd->phys_base = phys_base;
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gicd->gic_version = gic_version;
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}
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void acpi_write_madt_gicr(struct acpi_madt_gicr *gicr,
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u64 discovery_range_base_address,
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u32 discovery_range_length)
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{
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memset(gicr, '\0', sizeof(struct acpi_madt_gicr));
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gicr->type = ACPI_APIC_GICR;
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gicr->length = sizeof(struct acpi_madt_gicr);
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gicr->discovery_range_base_address = discovery_range_base_address;
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gicr->discovery_range_length = discovery_range_length;
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}
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void acpi_write_madt_its(struct acpi_madt_its *its,
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u32 its_id,
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u64 physical_base_address)
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{
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memset(its, '\0', sizeof(struct acpi_madt_its));
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its->type = ACPI_APIC_ITS;
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its->length = sizeof(struct acpi_madt_its);
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its->gic_its_id = its_id;
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its->physical_base_address = physical_base_address;
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}
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int acpi_pptt_add_proc(struct acpi_ctx *ctx, const u32 flags, const u32 parent,
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const u32 proc_id, const u32 num_resources,
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const u32 *resource_list)
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{
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struct acpi_pptt_proc *proc = ctx->current;
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int offset;
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offset = ctx->current - ctx->tab_start;
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proc->hdr.type = ACPI_PPTT_TYPE_PROC;
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proc->flags = flags;
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proc->parent = parent;
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proc->proc_id = proc_id;
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proc->num_resources = num_resources;
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proc->hdr.length = sizeof(struct acpi_pptt_proc) +
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sizeof(u32) * num_resources;
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if (resource_list)
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memcpy(proc + 1, resource_list, sizeof(u32) * num_resources);
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acpi_inc(ctx, proc->hdr.length);
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return offset;
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}
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int acpi_pptt_add_cache(struct acpi_ctx *ctx, const u32 flags,
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const u32 next_cache_level, const u32 size,
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const u32 sets, const u8 assoc, const u8 attributes,
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const u16 line_size)
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{
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struct acpi_pptt_cache *cache = ctx->current;
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int offset;
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offset = ctx->current - ctx->tab_start;
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cache->hdr.type = ACPI_PPTT_TYPE_CACHE;
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cache->hdr.length = sizeof(struct acpi_pptt_cache);
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cache->flags = flags;
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cache->next_cache_level = next_cache_level;
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cache->size = size;
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cache->sets = sets;
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cache->assoc = assoc;
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cache->attributes = attributes;
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cache->line_size = line_size;
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acpi_inc(ctx, cache->hdr.length);
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return offset;
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}
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void *acpi_fill_madt(struct acpi_madt *madt, struct acpi_ctx *ctx)
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{
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uclass_probe_all(UCLASS_CPU);
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uclass_probe_all(UCLASS_IRQ);
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/* All SoCs must use the driver model */
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acpi_fill_madt_subtbl(ctx);
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return ctx->current;
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}
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/**
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* acpi_write_pp_setup_one_page() - Fill out one page used by the PP
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*
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* Fill out the struct acpi_pp_page to contain the spin-loop
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* code and the mailbox area. After this function the page is ready for
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* the secondary core's to enter the spin-loop code.
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*
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* @page: Pointer to current parking protocol page
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* @gicc: Pointer to corresponding GICC sub-table
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*/
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static void acpi_write_pp_setup_one_page(struct acpi_pp_page *page,
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struct acpi_madt_gicc *gicc)
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{
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void *reloc;
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/* Update GICC. Mark parking protocol as available. */
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gicc->parking_proto = ACPI_PP_VERSION;
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gicc->parked_addr = virt_to_phys(page);
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/* Prepare parking protocol page */
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memset(page, '\0', sizeof(struct acpi_pp_page));
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/* Init mailbox. Set MPIDR so core's will find their page. */
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page->cpu_id = gicc->mpidr;
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page->jumping_address = ACPI_PP_JMP_ADR_INVALID;
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/* Relocate spinning code */
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reloc = &page->spinning_code[0];
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log_debug("Relocating spin table from %lx to %lx (size %x)\n",
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(ulong)&acpi_pp_code_start, (ulong)reloc, acpi_pp_code_size);
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memcpy(reloc, &acpi_pp_code_start, acpi_pp_code_size);
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if (!CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
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flush_dcache_range((unsigned long)page,
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(unsigned long)(page + 1));
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}
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void acpi_write_park(struct acpi_madt *madt)
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{
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struct acpi_pp_page *start, *page;
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struct acpi_madt_gicc *gicc;
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int ret, i, ncpus = 0;
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/*
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* According to the "Multi-processor Startup for ARM Platforms":
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* - Every CPU as specified by MADT GICC has it's own 4K page
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* - Every page is divided into two sections: OS and FW reserved
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* - Memory occupied by "Parking Protocol" must be marked 'Reserved'
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* - Spinloop code should reside in FW reserved 2048 bytes
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* - Spinloop code will check the mailbox in OS reserved area
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*/
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if (acpi_pp_code_size > sizeof(page->spinning_code)) {
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log_err("Spinning code too big to fit: %d\n",
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acpi_pp_code_size);
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return;
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}
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/* Count all MADT GICCs including BSP */
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for (i = sizeof(struct acpi_madt); i < madt->header.length;
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i += gicc->length) {
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gicc = (struct acpi_madt_gicc *)((void *)madt + i);
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if (gicc->type != ACPI_APIC_GICC)
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continue;
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ncpus++;
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}
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log_debug("Found %#x GICCs in MADT\n", ncpus);
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/* Allocate pages linearly due to assembly code requirements */
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start = bloblist_add(BLOBLISTT_ACPI_PP, ACPI_PP_PAGE_SIZE * ncpus,
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ilog2(SZ_4K));
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if (!start) {
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log_err("Failed to allocate memory for ACPI-parking-protocol pages\n");
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return;
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}
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log_debug("Allocated parking protocol at %p\n", start);
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page = start;
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if (IS_ENABLED(CONFIG_EFI_LOADER)) {
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/* Default mapping is 'BOOT CODE'. Mark as reserved instead. */
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ret = efi_add_memory_map((u64)(uintptr_t)start,
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ncpus * ACPI_PP_PAGE_SIZE,
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EFI_RESERVED_MEMORY_TYPE);
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if (ret)
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log_err("Reserved memory mapping failed addr %p size %x\n",
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start, ncpus * ACPI_PP_PAGE_SIZE);
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}
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/* Prepare the parking protocol pages */
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for (i = sizeof(struct acpi_madt); i < madt->header.length;
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i += gicc->length) {
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gicc = (struct acpi_madt_gicc *)((void *)madt + i);
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if (gicc->type != ACPI_APIC_GICC)
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continue;
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acpi_write_pp_setup_one_page(page++, gicc);
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}
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acpi_pp_etables = virt_to_phys(start) +
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ACPI_PP_PAGE_SIZE * ncpus;
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acpi_pp_tables = virt_to_phys(start);
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/* Make sure other cores see written value in memory */
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if (!CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
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flush_dcache_all();
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/* Send an event to wake up the secondary CPU. */
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asm("dsb ishst\n"
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"sev");
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}
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