40 lines
1011 B
C
40 lines
1011 B
C
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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/*
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* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
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*/
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#ifndef __SPIFC_H__
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#define __SPIFC_H__
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/*
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* @reg: controller registers base address.
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* @mem_map: memory_mapped for read operations.
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* @core: clk source, usually clk_81, 166M max.
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* @speed: spi bus frequency, and you should know
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* we use clk_81 as the clk source now, max
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* speed is 166M.
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* @io_num: max io number, SIO0 SIO1 SIO2 SIO3.
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* @max_cs: the max slave device number, we support
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* spi-nor, spi-nand now.
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* @cs_gpios: gpio array, we use the cs pin as
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* gpio, cause the spifc controller
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* can not hold enough time sometimes.
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*/
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struct spifc_platdata {
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ulong reg;
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ulong mem_map;
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u32 speed;
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u32 mode;
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u32 io_num;
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u32 max_cs;
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};
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/* this is cs pin number, not slave device cs number */
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/* #define SPIFC_MAX_CS 1 */
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#define SPIFC_BUS_NUM 0
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/* slave device cs number */
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#define SPIFC_SNOR_CS 0
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#define SPIFC_SNAND_CS 1
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#endif /* __SPIFC_H__ */ |