40 lines
853 B
C
40 lines
853 B
C
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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/*
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* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
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*/
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#ifndef __SPICC_H__
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#define __SPICC_H__
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#define SPICC_DEFAULT_CLK_RATE 166666666
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#define CS_GPIO_MAX 2
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/*
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* @compatible:
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* @reg: controller registers address.
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* @mem_map: memory_mapped for read operations.
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* @clk_rate:
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* @clk_set_rate:
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* @pinctrl_enable:
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* @num_chipselect:
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* @cs_gpios:
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*/
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struct spicc_platdata {
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#ifndef CONFIG_OF_CONTROL
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char *compatible;
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int clk_rate;
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int (*clk_set_rate)(int rate);
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int (*clk_enable)(bool enable);
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int (*pinctrl_enable)(bool enable);
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#endif
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void __iomem *reg;
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const char *cs_gpio_names[CS_GPIO_MAX];
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unsigned int clk_cs_delay;
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unsigned int mo_delay;
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unsigned int mi_delay;
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unsigned int mi_capture_delay;
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unsigned int tt_delay;
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unsigned int ti_delay;
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};
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#endif /* __SPICC_H__ */ |