74 lines
2.3 KiB
C
74 lines
2.3 KiB
C
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
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*/
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#include <config.h>
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#include <common.h>
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#include <linux/bitops.h>
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#include <dm.h>
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#include <phy.h>
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/* This function is provided to cope with the possible failures of this phy
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* during aneg process. When aneg fails, the PHY reports that aneg is done
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* but the value found in MII_LPA is wrong:
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* - Early failures: MII_LPA is just 0x0001. if MII_EXPANSION reports that
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* the link partner (LP) supports aneg but the LP never acked our base
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* code word, it is likely that we never sent it to begin with.
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* - Late failures: MII_LPA is filled with a value which seems to make sense
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* but it actually is not what the LP is advertising. It seems that we
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* can detect this using a magic bit in the WOL bank (reg 12 - bit 12).
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* If this particular bit is not set when aneg is reported being done,
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* it means MII_LPA is likely to be wrong.
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*
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* In both case, forcing a restart of the aneg process solve the problem.
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* When this failure happens, the first retry is usually successful but,
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* in some cases, it may take up to 6 retries to get a decent result
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*/
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extern unsigned int setup_amp;
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int meson_aml_startup(struct phy_device *phydev)
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{
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int ret;
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ret = genphy_update_link(phydev);
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if (ret)
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return ret;
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return genphy_parse_link(phydev);
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}
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static int meson_phy_config(struct phy_device *phydev)
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{
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// unsigned int setup_amp = readl(SYSCTRL_SEC_STATUS_REG12);
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unsigned int efuse_valid = 0;
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efuse_valid = setup_amp >> 4;
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if (efuse_valid) {
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/*Enable Analog and DSP register Bank access by*/
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phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0000);
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phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0400);
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phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0000);
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phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0400);
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phy_write(phydev, MDIO_DEVAD_NONE, 0x17, setup_amp & 0xf);
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phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x4418);
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printf("setup_amp = %x\n", (setup_amp & 0xf));
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}
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return genphy_config(phydev);
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}
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static struct phy_driver amlogic_internal_driver = {
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.name = "Meson GXL Internal PHY",
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.uid = 0x01803300,
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.mask = 0xfffffff0,
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.features = PHY_BASIC_FEATURES,
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.config = &meson_phy_config,
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.startup = &meson_aml_startup,
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.shutdown = &genphy_shutdown,
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};
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int phy_amlogic_init(void)
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{
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phy_register(&amlogic_internal_driver);
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return 0;
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}
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