BPI-CM9-Linux/aml-comp/uboot/bl33/v2019/drivers/mtd/nand/spi/xtx.c

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
 */

#ifndef __UBOOT__
#include <linux/device.h>
#include <linux/kernel.h>
#endif
#include <linux/mtd/spinand.h>
#include <linux/bitfield.h>

#define SPINAND_MFR_XTX			0x0b

#define XTX_STATUS_ECC_MASK				GENMASK(7, 4)
#define XTX_STATUS_ECC_NO_BITFLIPS		(0 << 4)
#define XTX_STATUS_ECC_4_BITFLIPS		BIT(4)
#define XTX_STATUS_ECC_5_BITFLIPS		(BIT(4) | BIT(6))
#define XTX_STATUS_ECC_6_BITFLIPS		(BIT(4) | BIT(7))
#define XTX_STATUS_ECC_7_BITFLIPS		(BIT(4) | BIT(6) | BIT(7))
#define XTX_STATUS_ECC_8_BITFLIPS		(BIT(4) | BIT(5))
#define XTX_STATUS_ECC_UNCOR_ERROR		BIT(5)

#define XT26XXXD_STATUS_ECC3_ECC2_MASK	    GENMASK(7, 6)
#define XT26XXXD_STATUS_ECC_NO_DETECTED     (0)
#define XT26XXXD_STATUS_ECC_1_7_CORRECTED   (1)
#define XT26XXXD_STATUS_ECC_8_CORRECTED     (3)
#define XT26XXXD_STATUS_ECC_UNCOR_ERROR     (2)

static SPINAND_OP_VARIANTS(read_cache_variants,
		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
		SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));

static SPINAND_OP_VARIANTS(write_cache_variants,
		SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
		SPINAND_PROG_LOAD(true, 0, NULL, 0));

static SPINAND_OP_VARIANTS(update_cache_variants,
		//SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
		SPINAND_PROG_LOAD(false, 0, NULL, 0));

static int xt26q1xd_ooblayout_ecc(struct mtd_info *mtd, int section,
				   struct mtd_oob_region *region)
{
	/* Unable to know the layout of ECC */
	return -ERANGE;
}

static int xt26q1xd_ooblayout_free(struct mtd_info *mtd, int section,
				   struct mtd_oob_region *region)
{
	if (section)
		return -ERANGE;

	/* Reserve 2 bytes for the BBM. */
	region->offset = 2;
	region->length = 126;

	return 0;
}

static const struct mtd_ooblayout_ops xt26q1xd_ooblayout = {
	.ecc = xt26q1xd_ooblayout_ecc,
	.free = xt26q1xd_ooblayout_free,
};

static int xt26q1xd_ecc_get_status(struct spinand_device *spinand,
				   u8 status)
{
	switch (status & XTX_STATUS_ECC_MASK) {
	case XTX_STATUS_ECC_NO_BITFLIPS:
		return 0;
	/*
	 * We have no way to know exactly how many bitflips have been
	 * fixed, so let's return the maximum possible value so that
	 * wear-leveling layers move the data immediately.
	 */
	case XTX_STATUS_ECC_4_BITFLIPS:
		return 4;
	case XTX_STATUS_ECC_5_BITFLIPS:
		return 5;
	case XTX_STATUS_ECC_6_BITFLIPS:
		return 6;
	case XTX_STATUS_ECC_7_BITFLIPS:
		return 7;
	case XTX_STATUS_ECC_8_BITFLIPS:
		return 8;
	case XTX_STATUS_ECC_UNCOR_ERROR:
		return -EBADMSG;

	default:
		break;
	}

	return -EINVAL;
}

static int xt26xxxd_ooblayout_ecc(struct mtd_info *mtd, int section,
				  struct mtd_oob_region *region)
{
	if (section)
		return -ERANGE;

	region->offset = mtd->oobsize / 2;
	region->length = mtd->oobsize / 2;

	return 0;
}

static int xt26xxxd_ooblayout_free(struct mtd_info *mtd, int section,
				   struct mtd_oob_region *region)
{
	if (section)
		return -ERANGE;

	region->offset = 2;
	region->length = mtd->oobsize / 2 - 2;

	return 0;
}

static const struct mtd_ooblayout_ops xt26xxxd_ooblayout = {
	.ecc = xt26xxxd_ooblayout_ecc,
	.free = xt26xxxd_ooblayout_free,
};

static int xt26xxxd_ecc_get_status(struct spinand_device *spinand,
				   u8 status)
{
	switch (FIELD_GET(STATUS_ECC_MASK, status)) {
	case XT26XXXD_STATUS_ECC_NO_DETECTED:
		return 0;
	case XT26XXXD_STATUS_ECC_UNCOR_ERROR:
		return -EBADMSG;
	case XT26XXXD_STATUS_ECC_1_7_CORRECTED:
		return 4 + FIELD_GET(XT26XXXD_STATUS_ECC3_ECC2_MASK, status);
	case XT26XXXD_STATUS_ECC_8_CORRECTED:
		return 8;
	default:
		break;
	}

	return -EINVAL;
}

static const struct spinand_info xtx_spinand_table[] = {
	SPINAND_INFO("XT26Q18DWSIGA 1.8V", 0x58,
		     NAND_MEMORG(1, 4096, 256, 64, 4096, 1, 1, 1),
		     NAND_ECCREQ(8, 512),
		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
					      &write_cache_variants,
					      &update_cache_variants),
		     SPINAND_HAS_QE_BIT,
		     SPINAND_ECCINFO(&xt26q1xd_ooblayout,
				     xt26q1xd_ecc_get_status)),
	SPINAND_INFO("XT26Q04DWSIGA 1.8V", 0x53,
		     NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
		     NAND_ECCREQ(8, 512),
		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
					      &write_cache_variants,
					      &update_cache_variants),
		     SPINAND_HAS_QE_BIT,
		     SPINAND_ECCINFO(&xt26xxxd_ooblayout,
				     xt26xxxd_ecc_get_status)),
};

static int xtx_spinand_detect(struct spinand_device *spinand)
{
	u8 *id = spinand->id.data;
	int ret;

	if (id[0] != SPINAND_MFR_XTX)
		return 0;

	ret = spinand_match_and_init(spinand, xtx_spinand_table,
				     ARRAY_SIZE(xtx_spinand_table),
				     id + 1, 0);
	if (ret)
		return ret;

	return 1;
}

static const struct spinand_manufacturer_ops xtx_spinand_manuf_ops = {
	.detect = xtx_spinand_detect,
};

const struct spinand_manufacturer xtx_spinand_manufacturer = {
	.id = SPINAND_MFR_XTX,
	.name = "xtx",
	.ops = &xtx_spinand_manuf_ops,
};