121 lines
3.1 KiB
C
121 lines
3.1 KiB
C
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
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*/
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#include <config.h>
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#include <common.h>
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#include <asm/arch/io.h>
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#include <asm/arch/secure_apb.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/oscring.h>
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void ring_powerinit(void)
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{
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writel(0x18000a, RING_PWM_VCCK);/*set vcck 0.8v*/
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writel(0x90009, RING_PWM_EE);/*set ee 0.8v*/
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}
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unsigned long clk_util_ring_msr(unsigned long clk_mux)
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{
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unsigned int regval = 0;
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writel(0, MSR_CLK_REG0);
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/* Set the measurement gate to 64uS */
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/* 64uS is enough for measure the frequence? */
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setbits_le32(MSR_CLK_REG0, (10000 - 1));
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/* Disable continuous measurement */
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/* Disable interrupts */
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clrbits_le32(MSR_CLK_REG0, (1 << 17) | (1 << 18));
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clrbits_le32(MSR_CLK_REG0, 0x7f << 20);
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setbits_le32(MSR_CLK_REG0, (clk_mux) << 20 | (1 << 19) | (1 << 16));
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mdelay(10);
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/* Wait for the measurement to be done */
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regval = readl(MSR_CLK_REG0);
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do {
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regval = readl(MSR_CLK_REG0);
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} while (regval & (1 << 31));
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/* Disable measuring */
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clrbits_le32(MSR_CLK_REG0, 1 << 16);
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regval = (readl(MSR_CLK_REG2) + 31) & 0x000fffff;
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return (regval / 10);
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}
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int ring_msr(int index)
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{
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const char* clk_table[] = {
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[17] = "dspa_osc_ring(SVT16) " ,
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[16] = "axi_sram_osc_ring(SVT16) " ,
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[15] = "sys_cpu_osc_ring3(LVT16) " ,
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[14] = "sys_cpu_osc_ring2(ULVT16) " ,
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[13] = "sys_cpu_osc_ring1(ULVT20) " ,
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[12] = "sys_cpu_osc_ring0(ULVT16) " ,
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[11] = "ddr_osc_ring(LVT16) " ,
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[10] = "dos_osc_ring3(ULVT20) " ,
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[9] = "dos_osc_ring2(LVT16) " ,
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[8] = "dos_osc_ring1(SVT16) " ,
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[7] = "dos_osc_ring0(SVT24) " ,
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[6] = "vpu_osc_ring2(LVT16) " ,
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[5] = "vpu_osc_ring1(LVT20) " ,
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[4] = "vpu_osc_ring0(SVT24) " ,
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[3] = "gpu_osc_ring2(SVT16) " ,
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[2] = "gpu_osc_ring1(ULVT16) " ,
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[1] = "gpu_osc_ring0(LVT16) " ,
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[0] = "dmc_osc_ring(LVT16) " ,
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};
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const int tb[] = {180, 181, 182, 183, 184, 185, 186, 187, 188, 189,
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190, 191, 192, 193, 194, 195, 196, 197};
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unsigned long i;
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uint8_t efuseinfo[4] = {0, 0, 0, 0};
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if ((index != 0xff) && (index != 0)) {
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if (bl31_get_cornerinfo(efuseinfo, sizeof(efuseinfo) / sizeof(uint8_t)) != 0) {
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printf("fail get efuse info\n");
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return 0;
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}
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if ((index >= 1) && (index <= 3))
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printf("%d\n", efuseinfo[index]);
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else
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printf("input data not support!\n");
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return 0;
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}
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if (0xff != index) {
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ring_powerinit();
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printf("set vcck vddee to 800mv\n");
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}
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/*RING_OSCILLATOR 0x7f: set slow ring*/
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writel(OSCRING_CTL_DATA0, OSCRING_CTL_REG0);
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writel(OSCRING_CTL_DATA1, OSCRING_CTL_REG1);
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for (i = 0; i < 18; i++) {
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printf("%s :",clk_table[i]);
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printf("%ld KHz",clk_util_ring_msr(tb[i]));
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printf("\n");
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}
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if (bl31_get_cornerinfo(efuseinfo, sizeof(efuseinfo) / sizeof(uint8_t)) != 0) {
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printf("fail get efuse info\n");
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return 0;
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}
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printf("osc efuse info:\n");
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for (i = 0; i < sizeof(efuseinfo) / sizeof(uint8_t); i++)
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printf("0x%x, ", efuseinfo[i]);
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printf("\n");
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/*efuse to test value*/
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printf("osc_ring_core0(20lvt), idd_ee, idd_cpu\n");
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printf("%d KHz ", (efuseinfo[1] * 20));
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for (i = 2; i <=3; i++) {
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printf("%d uA ", (efuseinfo[i] * 400));
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}
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printf("\n");
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return 0;
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}
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