184 lines
6.2 KiB
C
184 lines
6.2 KiB
C
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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/*
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* include/amlogic/aml_lcd.h
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*
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* Copyright (C) 2020 Amlogic, Inc. All rights reserved.
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*
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*/
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#ifndef INC_AML_LCD_H
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#define INC_AML_LCD_H
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#include <common.h>
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#include <linux/list.h>
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#include <amlogic/aml_lcd_vout.h>
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#ifdef CONFIG_AML_LCD_EXTERN
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#include <amlogic/aml_lcd_extern.h>
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#endif
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#ifdef CONFIG_AML_BL_EXTERN
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#include <amlogic/aml_bl_extern.h>
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#endif
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#ifdef CONFIG_SYS_I2C_AML
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#define LCD_EXT_I2C_BUS_0 1 //A
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#define LCD_EXT_I2C_BUS_1 2 //B
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#define LCD_EXT_I2C_BUS_2 3 //C
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#define LCD_EXT_I2C_BUS_3 4 //D
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#define LCD_EXT_I2C_BUS_4 0 //AO
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#define LCD_EXT_I2C_BUS_MAX 0xff
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#else
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#define LCD_EXT_I2C_BUS_0 0 //A
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#define LCD_EXT_I2C_BUS_1 1 //B
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#define LCD_EXT_I2C_BUS_2 2 //C
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#define LCD_EXT_I2C_BUS_3 3 //D
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#define LCD_EXT_I2C_BUS_4 4 //AO
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#define LCD_EXT_I2C_BUS_MAX 0xff
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#endif
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#define LCD_EXT_I2C_BUS_INVALID 0xff
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#define LCD_EXT_I2C_ADDR_INVALID 0xff
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#define LCD_EXT_GPIO_INVALID 0xff
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#define LCD_EXT_SPI_CLK_FREQ_DFT 10 /* unit: KHz */
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/*******************************************/
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/* LCD EXT CMD */
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/*******************************************/
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#define LCD_EXT_CMD_TYPE_CMD_DELAY 0x00
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#define LCD_EXT_CMD_TYPE_CMD2_DELAY 0x01 /* for i2c device 2nd addr */
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#define LCD_EXT_CMD_TYPE_CMD3_DELAY 0x02 /* for i2c device 3rd addr */
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#define LCD_EXT_CMD_TYPE_CMD4_DELAY 0x03 /* for i2c device 4th addr */
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#define LCD_EXT_CMD_TYPE_NONE 0x10
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#define LCD_EXT_CMD_TYPE_MULTI_LIST_FR 0x21 /* dlg fr multi list, 1byte frame rate*/
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#define LCD_EXT_CMD_TYPE_MULTI_LIST_UFR 0x2f /* ufr fr multi list, 2byte frame rate*/
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#define LCD_EXT_CMD_TYPE_CMD_BIN2 0xa0 /* replace data with offset by reg_addr */
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#define LCD_EXT_CMD_TYPE_CMD2_BIN2 0xa1 /* for i2c device 2nd addr */
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#define LCD_EXT_CMD_TYPE_CMD3_BIN2 0xa2 /* for i2c device 3rd addr */
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#define LCD_EXT_CMD_TYPE_CMD4_BIN2 0xa3 /* for i2c device 4th addr */
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#define LCD_EXT_CMD_TYPE_CMD_BIN 0xb0 /* auto fill reg addr 0x0, and data */
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#define LCD_EXT_CMD_TYPE_CMD2_BIN 0xb1 /* for i2c device 2nd addr */
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#define LCD_EXT_CMD_TYPE_CMD3_BIN 0xb2 /* for i2c device 3rd addr */
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#define LCD_EXT_CMD_TYPE_CMD4_BIN 0xb3 /* for i2c device 4th addr */
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#define LCD_EXT_CMD_TYPE_CMD 0xc0
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#define LCD_EXT_CMD_TYPE_CMD2 0xc1 /* for i2c device 2nd addr */
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#define LCD_EXT_CMD_TYPE_CMD3 0xc2 /* for i2c device 3rd addr */
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#define LCD_EXT_CMD_TYPE_CMD4 0xc3 /* for i2c device 4th addr */
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#define LCD_EXT_CMD_TYPE_CMD_BIN_DATA 0xd0 /* nonexistent reg_addr, all data replace */
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#define LCD_EXT_CMD_TYPE_CMD2_BIN_DATA 0xd1 /* for i2c device 2nd addr */
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#define LCD_EXT_CMD_TYPE_CMD3_BIN_DATA 0xd2 /* for i2c device 3rd addr */
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#define LCD_EXT_CMD_TYPE_CMD4_BIN_DATA 0xd3 /* for i2c device 4th addr */
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#define LCD_EXT_CMD_TYPE_CMD_MULTI 0xe0
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#define LCD_EXT_CMD_TYPE_CMD2_MULTI 0xe1
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#define LCD_EXT_CMD_TYPE_CMD3_MULTI 0xe2
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#define LCD_EXT_CMD_TYPE_CMD4_MULTI 0xe3
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#define LCD_EXT_CMD_TYPE_MULTI_CMD 0xec /* cmd for multi list matching*/
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#define LCD_EXT_CMD_TYPE_MULTI_DFT_CMD 0xed /* cmd for multi list matching,
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* as default setting bypass when power on
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*/
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#define LCD_EXT_CMD_TYPE_GPIO 0xf0
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#define LCD_EXT_CMD_TYPE_WAIT_GPIO 0xf4
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#define LCD_EXT_CMD_TYPE_CHECK_RETRY 0xfb
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#define LCD_EXT_CMD_TYPE_CHECK 0xfc
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#define LCD_EXT_CMD_TYPE_DELAY 0xfd
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#define LCD_EXT_CMD_TYPE_EXIT 0xfe
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#define LCD_EXT_CMD_TYPE_END 0xff
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#define LCD_EXT_CMD_SIZE_DYNAMIC 0xff
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#define LCD_EXT_DYNAMIC_SIZE_INDEX 1
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#define Rsv_val 0xffffffff
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struct ext_lcd_config_s {
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const char panel_type[15];
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unsigned int lcd_type; // LCD_TTL /LCD_LVDS/LCD_VBYONE
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unsigned char lcd_bits;
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unsigned short h_active;
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unsigned short v_active;
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unsigned short h_period;
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unsigned short v_period;
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unsigned short hsync_width;
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unsigned short hsync_bp;
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unsigned short hsync_pol;
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unsigned short vsync_width;
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unsigned short vsync_bp;
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unsigned short vsync_pol;
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unsigned int customer_val_0; //fr_adjust_type
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unsigned int customer_val_1; //ss_level
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unsigned int customer_val_2; //clk_auto_generate
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unsigned int customer_val_3; //pixel clock(unit in Hz)
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unsigned int customer_val_4;
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unsigned int customer_val_5;
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unsigned int customer_val_6;
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unsigned int customer_val_7;
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unsigned int customer_val_8;
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unsigned int customer_val_9;
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unsigned int lcd_spc_val0;
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unsigned int lcd_spc_val1;
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unsigned int lcd_spc_val2;
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unsigned int lcd_spc_val3;
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unsigned int lcd_spc_val4;
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unsigned int lcd_spc_val5;
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unsigned int lcd_spc_val6;
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unsigned int lcd_spc_val7;
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unsigned int lcd_spc_val8;
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unsigned int lcd_spc_val9;
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struct lcd_power_step_s *power_on_step;
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struct lcd_power_step_s *power_off_step;
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/* backlight */
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unsigned int level_default;
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unsigned int level_max;
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unsigned int level_min;
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unsigned int level_mid;
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unsigned int level_mid_mapping;
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unsigned int bl_method;
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unsigned int bl_en_gpio;
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unsigned short bl_en_gpio_on;
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unsigned short bl_en_gpio_off;
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unsigned short bl_power_on_delay;
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unsigned short bl_power_off_delay;
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unsigned int pwm_method;
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unsigned int pwm_port;
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unsigned int pwm_freq;
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unsigned int pwm_duty_max;
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unsigned int pwm_duty_min;
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unsigned int pwm_gpio;
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unsigned int pwm_gpio_off;
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unsigned int pwm2_method;
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unsigned int pwm2_port;
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unsigned int pwm2_freq;
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unsigned int pwm2_duty_max;
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unsigned int pwm2_duty_min;
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unsigned int pwm2_gpio;
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unsigned int pwm2_gpio_off;
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unsigned int pwm_level_max;
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unsigned int pwm_level_min;
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unsigned int pwm2_level_max;
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unsigned int pwm2_level_min;
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unsigned int pwm_on_delay;
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unsigned int pwm_off_delay;
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/* backlight extern */
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unsigned int bl_ext_index;
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};
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#define LCD_NUM_MAX 20
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#define LCD_PRBS_MODE_LVDS (1 << 0)
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#define LCD_PRBS_MODE_VX1 (1 << 1)
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#define LCD_PRBS_MODE_MAX 2
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extern struct ext_lcd_config_s ext_lcd_config[LCD_NUM_MAX];
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#endif /* INC_AML_LCD_H */
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