117 lines
3.2 KiB
C
117 lines
3.2 KiB
C
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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/*
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* drivers/net/aml_phy_8700.h
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*
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* Copyright (C) 2020 Amlogic, Inc. All rights reserved.
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*
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*/
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#ifndef __AML_PHY_LAN8700_H__
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#define __AML_PHY_LAN8700_H__
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#include <config.h>
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/*-------------------------------------------
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.
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. A description of the SMSC LAN8700 regn order here
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.
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---------------------------------------------------*/
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#define PHY_CR 0
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#define PHY_CR_RST (1<<15)
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#define PHY_CR_LOOPBACK (1<<14)
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#define PHY_CR_SPEED (1<<13)
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#define PHY_CR_AN (1<<12)
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#define PHY_CR_PWRDOWN (1<<11)
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#define PHY_CR_ISOLATE (1<<10)
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#define PHY_CR_RSTAN (1<<9)
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#define PHY_CR_DPLX (1<<8)
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#define PHY_CR_CT (1<<7)
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#define PHY_SR 1
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#define PHY_SR_100BT4 (1<<15)
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#define PHY_SR_100BTF (1<<14)
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#define PHY_SR_100BTH (1<<13)
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#define PHY_SR_10BTF (1<<12)
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#define PHY_SR_10BTH (1<<11)
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#define PHY_SR_ANCOMPLETE (1<<5)
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#define PHY_SR_REMOTEFAULT (1<<4)
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#define PHY_SR_ANABILITY (1<<3)
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#define PHY_SR_LINKSTATUS (1<<2)
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#define PHY_JABBER (1<<1)
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#define PHY_EXTCAP (1)
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#define PHY_SPMD 18
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#define PHY_SPMD_PHYAD_P 0
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#define PHY_SPMD_MODE_P 5
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#define PHY_SPMD_MIIMODE_P 14
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#define PHY_SPMD_MIIMODE_MII (0<<14)
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#define PHY_SPMD_MIIMODE_RMII (1<<14)
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#define PHY_SPCT 31
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#define PHY_SPCT_SCD_P 0
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#define PHY_SPCT_SPD_P 2
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#define PHY_SPCT_E4B5B_P 6
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#define PHY_SPCT_GPO_P 7
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#define PHY_SPCT_ATDW_P 12
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#define PHY_SPCT_SCD (1<<PHY_SPCT_SCD_P)
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#define PHY_SPCT_SPD_10H (1<<PHY_SPCT_SPD_P)
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#define PHY_SPCT_SPD_10F (5<<PHY_SPCT_SPD_P)
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#define PHY_SPCT_SPD_100H (2<<PHY_SPCT_SPD_P)
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#define PHY_SPCT_SPD_100F (6<<PHY_SPCT_SPD_P)
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#define PHY_SPCT_E4B5B (1<<PHY_SPCT_E4B5B_P)
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#define PHY_SPCT_GPO (1<<PHY_SPCT_GPO_P)
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#define PHY_SPCT_ATDW (1<<PHY_SPCT_ATDW_P)
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#define ETH_MAC_0_TC (1<<24)
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#define ETH_MAC_0_MIIPORT (1<<15)
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#define ETH_MAC_0_FES_100M (1<<14)
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#define ETH_MAC_0_DM (1<<11)
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#define ETH_MAC_0_LM (1<<12)
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#define ETH_MAC_0_LINK (1<<8)
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#define ETH_MAC_0_TE (1<<3)
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#define ETH_MAC_0_RE (1<<2)
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//MODE BUS
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#define PHY_MODE_BUS_10HD_AD 0
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#define PHY_MODE_BUS_10FD_AD 1
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#define PHY_MODE_BUS_100HD_AD 2
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#define PHY_MODE_BUS_100FD_AD 3
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#define PHY_MODE_BUS_100HD_AE 4
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#define PHY_MODE_BUS_RP_AE 5
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#define PHY_MODE_BUS_PWDN 6
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#define PHY_MODE_BUS_ALL_AE 7
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//Normal Interrupts
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#define NOR_INTR_EN 1<<16
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#define TX_INTR_EN 1<<0
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#define TX_BUF_UN_EN 1<<2
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#define RX_INTR_EN 1<<6
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#define EARLY_RX_INTR_EN 1<<14
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//Abnormal Interrupts
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#define ANOR_INTR_EN 1<<15
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#define TX_STOP_EN 1<<1
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#define TX_JABBER_TIMEOUT 1<<3
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#define RX_FIFO_OVER 1<<4
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#define TX_UNDERFLOW 1<<5
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#define RX_BUF_UN 1<<7
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#define RX_STOP_EN 1<<8
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#define RX_WATCH_TIMEOUT 1<<9
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#define EARLY_TX_INTR_EN 1<<10
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#define FATAL_BUS_ERROR 1<<13
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#define SEGMENT_FIRST 1<<29
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#define SEGMENT_END 1<<30
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#define SEGMENT_FIRST_END 3<<29
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#define FIRST_BUFFER 1600;
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#define MIDDLE_BUFFER 1601;
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#define LAST_BUFFER 1602;
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#define FIRST_LAST_BUFFER 1603;
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#endif /* __AML_EMAC_LAN8700_H__ */
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