313 lines
10 KiB
C
313 lines
10 KiB
C
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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/*
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* drivers/display/osd/osd_debug.c
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*
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* Copyright (C) 2020 Amlogic, Inc. All rights reserved.
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*
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*/
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/* System Headers */
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#include <config.h>
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#include <common.h>
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#include <malloc.h>
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#include <asm/arch/io.h>
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#include <asm/cpu_id.h>
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#include <asm/arch/cpu.h>
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/* Local Headers */
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#ifdef CONFIG_AML_CANVAS
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#include <amlogic/canvas.h>
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#endif
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#ifdef CONFIG_AML_VPU_REG_NEW
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#include <asm/arch/register.h>
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#endif
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/* Local Headers */
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#include "osd_log.h"
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#include "osd_io.h"
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#include "osd_hw.h"
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#define OSD_TEST_DURATION 500
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#define msleep(a) mdelay(a)
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extern struct hw_para_s osd_hw;
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static void osd_debug_dump_value(void)
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{
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u32 index = 0;
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struct hw_para_s *hwpara = NULL;
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struct pandata_s *pdata = NULL;
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osd_get_hw_para(&hwpara);
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if (hwpara == NULL)
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return;
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osd_logi("--- OSD ---\n");
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osd_logi("scan_mode: %s\n", (hwpara->scan_mode == SCAN_MODE_INTERLACE) ? "interlace" : "progressive");
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osd_logi("order: %d\n", hwpara->order);
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osd_logi("bot_type: %d\n", hwpara->bot_type);
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osd_logi("field_out_en: %d\n", hwpara->field_out_en);
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for (index = 0; index < HW_OSD_COUNT; index++) {
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osd_logi("\n--- OSD%d ---\n", index);
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osd_logi("enable: %d\n", hwpara->enable[index]);
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osd_logi("2x-scale enable.h:%d .v: %d\n",
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hwpara->scale[index].h_enable,
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hwpara->scale[index].v_enable);
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osd_logi("free-scale-mode: %d\n",
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hwpara->free_scale_mode[index]);
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osd_logi("free-scale enable.h:%d .v: %d\n",
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hwpara->free_scale[index].h_enable,
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hwpara->free_scale[index].v_enable);
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pdata = &hwpara->pandata[index];
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osd_logi("pan data:\n");
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osd_logi("\tx_start: %10d, x_end: %10d\n",
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pdata->x_start, pdata->x_end);
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osd_logi("\ty_start: %10d, y_end: %10d\n",
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pdata->y_start, pdata->y_end);
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pdata = &hwpara->dispdata[index];
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osd_logi("disp data:\n");
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osd_logi("\tx_start: 0x%08x, x_end: 0x%08x\n",
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pdata->x_start, pdata->x_end);
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osd_logi("\ty_start: 0x%08x, y_end: 0x%08x\n",
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pdata->y_start, pdata->y_end);
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pdata = &hwpara->scaledata[index];
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osd_logi("2x-scale data:\n");
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osd_logi("\tx_start: 0x%08x, x_end: 0x%08x\n",
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pdata->x_start, pdata->x_end);
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osd_logi("\ty_start: 0x%08x, y_end: 0x%08x\n",
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pdata->y_start, pdata->y_end);
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pdata = &hwpara->free_scale_data[index];
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osd_logi("free-scale src data:\n");
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osd_logi("\tx_start: 0x%08x, x_end: 0x%08x\n",
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pdata->x_start, pdata->x_end);
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osd_logi("\ty_start: 0x%08x, y_end: 0x%08x\n",
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pdata->y_start, pdata->y_end);
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pdata = &hwpara->free_dst_data[index];
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osd_logi("free-scale dst data:\n");
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osd_logi("\tx_start: 0x%08x, x_end: 0x%08x\n",
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pdata->x_start, pdata->x_end);
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osd_logi("\ty_start: 0x%08x, y_end: 0x%08x\n",
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pdata->y_start, pdata->y_end);
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}
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}
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static void osd_debug_dump_register_all(void)
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{
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u32 reg = 0;
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u32 offset = 0;
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u32 index = 0;
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reg = VPU_VIU_VENC_MUX_CTRL;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VPP_MISC;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VPP_OFIFO_SIZE;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VPP_HOLD_LINES;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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if (osd_hw.osd_ver == OSD_HIGH_ONE) {
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#ifdef CONFIG_AML_MESON_G12A
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reg = OSD_PATH_MISC_CTRL;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VIU_OSD_BLEND_CTRL;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VIU_OSD_BLEND_DIN0_SCOPE_H;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VIU_OSD_BLEND_DIN0_SCOPE_V;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VIU_OSD_BLEND_DIN1_SCOPE_H;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VIU_OSD_BLEND_DIN1_SCOPE_V;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VIU_OSD_BLEND_DIN2_SCOPE_H;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VIU_OSD_BLEND_DIN2_SCOPE_V;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VIU_OSD_BLEND_DIN3_SCOPE_H;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VIU_OSD_BLEND_DIN3_SCOPE_V;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VIU_OSD_BLEND_DUMMY_DATA0;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VIU_OSD_BLEND_DUMMY_ALPHA;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VIU_OSD_BLEND_BLEND0_SIZE;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VIU_OSD_BLEND_BLEND1_SIZE;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VPP_OSD1_IN_SIZE;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VPP_OSD1_BLD_H_SCOPE;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VPP_OSD1_BLD_V_SCOPE;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VPP_OSD2_BLD_H_SCOPE;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VPP_OSD2_BLD_V_SCOPE;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = OSD1_BLEND_SRC_CTRL;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = OSD2_BLEND_SRC_CTRL;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VPP_POSTBLEND_H_SIZE;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VPP_OUT_H_V_SIZE;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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#endif
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}
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reg = VPP_OSD_SC_CTRL0;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VPP_OSD_SCI_WH_M1;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VPP_OSD_SCO_H_START_END;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VPP_OSD_SCO_V_START_END;
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osd_logi("reg[0x%x]: 0x%08x\n\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VPP_POSTBLEND_H_SIZE;
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osd_logi("reg[0x%x]: 0x%08x\n\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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for (index = 0; index < 2; index++) {
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if (index == 1)
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offset = REG_OFFSET;
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reg = offset + VIU_OSD1_FIFO_CTRL_STAT;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = offset + VIU_OSD1_CTRL_STAT;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = offset + VIU_OSD1_BLK0_CFG_W0;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = offset + VIU_OSD1_BLK0_CFG_W1;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = offset + VIU_OSD1_BLK0_CFG_W2;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = offset + VIU_OSD1_BLK0_CFG_W3;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VIU_OSD1_BLK0_CFG_W4;
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if (index == 1)
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reg = VIU_OSD2_BLK0_CFG_W4;
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osd_logi("reg[0x%x]: 0x%08x\n\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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}
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#if defined(CONFIG_AML_MESON_G12A) && !defined(CONFIG_AML_T7_DISPLAY)
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/* for viu2_osd */
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if (!strcmp(getenv("display_layer"), "viu2_osd0")) {
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reg = VIU2_OSD1_FIFO_CTRL_STAT;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VIU2_OSD1_CTRL_STAT;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VIU2_OSD1_BLK0_CFG_W0;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VIU2_OSD1_BLK0_CFG_W1;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VIU2_OSD1_BLK0_CFG_W2;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VIU2_OSD1_BLK0_CFG_W3;
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osd_logi("reg[0x%x]: 0x%08x\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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reg = VIU2_OSD1_BLK0_CFG_W4;
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osd_logi("reg[0x%x]: 0x%08x\n\n", REG_INDEX_VCBUS(reg), osd_reg_read(reg));
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}
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#endif
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}
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static void osd_test_colorbar(void)
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{
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u32 encp_video_adv = 0;
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encp_video_adv = osd_reg_read(ENCP_VIDEO_MODE_ADV);
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/* start test mode */
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osd_logi("--- OSD TEST COLORBAR ---\n");
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osd_reg_write(ENCP_VIDEO_MODE_ADV, 0);
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osd_reg_write(VENC_VIDEO_TST_EN, 1);
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/* TST_MODE COLORBAR */
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osd_logi("- COLORBAR -\n");
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osd_reg_write(VENC_VIDEO_TST_MDSEL, 1);
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msleep(OSD_TEST_DURATION);
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/* TST_MODE THINLINE */
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osd_logi("- THINLINE -\n");
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osd_reg_write(VENC_VIDEO_TST_MDSEL, 2);
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msleep(OSD_TEST_DURATION);
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/* TST_MODE DOTGRID */
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osd_logi("- DOTGRID -\n");
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osd_reg_write(VENC_VIDEO_TST_MDSEL, 3);
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msleep(OSD_TEST_DURATION);
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/* stop test mode */
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osd_reg_write(ENCP_VIDEO_MODE_ADV, encp_video_adv);
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osd_reg_write(VENC_VIDEO_TST_EN, 0);
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osd_reg_write(VENC_VIDEO_TST_MDSEL, 0);
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}
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static void osd_reset(void)
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{
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osd_set_free_scale_enable_hw(0, 0);
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osd_enable_hw(0, 1);
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}
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static void osd_test_dummydata(void)
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{
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u32 dummy_data = 0;
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dummy_data = osd_reg_read(VPP_DUMMY_DATA1);
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osd_reset();
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osd_logi("--- OSD TEST DUMMYDATA ---\n");
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if (osd_hw.osd_ver == OSD_HIGH_ONE) {
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#ifdef CONFIG_AML_MESON_G12A
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osd_reg_write(VPP_POST_BLEND_BLEND_DUMMY_DATA, 0xff);
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msleep(OSD_TEST_DURATION);
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osd_reg_write(VPP_POST_BLEND_BLEND_DUMMY_DATA, 0xff00);
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msleep(OSD_TEST_DURATION);
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osd_reg_write(VPP_POST_BLEND_BLEND_DUMMY_DATA, 0xff0000);
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msleep(OSD_TEST_DURATION);
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osd_reg_write(VPP_POST_BLEND_BLEND_DUMMY_DATA, dummy_data);
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msleep(OSD_TEST_DURATION);
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#endif
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} else if (get_cpu_id().family_id ==
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MESON_CPU_MAJOR_ID_GXTVBB) {
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osd_reg_write(VPP_DUMMY_DATA1, 0xFF0000); /* R */
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msleep(OSD_TEST_DURATION);
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osd_reg_write(VPP_DUMMY_DATA1, 0xFF00); /* G */
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msleep(OSD_TEST_DURATION);
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osd_reg_write(VPP_DUMMY_DATA1, 0xFF); /* B */
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msleep(OSD_TEST_DURATION);
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osd_reg_write(VPP_DUMMY_DATA1, dummy_data);
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msleep(OSD_TEST_DURATION);
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} else {
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osd_reg_write(VPP_DUMMY_DATA1, 0xFF);
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msleep(OSD_TEST_DURATION);
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osd_reg_write(VPP_DUMMY_DATA1, 0);
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msleep(OSD_TEST_DURATION);
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osd_reg_write(VPP_DUMMY_DATA1, 0xFF00);
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msleep(OSD_TEST_DURATION);
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osd_reg_write(VPP_DUMMY_DATA1, dummy_data);
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msleep(OSD_TEST_DURATION);
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}
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}
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static void osd_debug_auto_test(void)
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{
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osd_test_colorbar();
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osd_test_dummydata();
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}
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void osd_debug(void)
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{
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osd_debug_dump_value();
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osd_logi("\n");
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osd_debug_dump_register_all();
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}
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void osd_test(void)
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{
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osd_debug_auto_test();
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}
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