61 lines
1.7 KiB
C
61 lines
1.7 KiB
C
/*
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* Copyright (c) 2021-2022 Amlogic, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: MIT
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*/
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#ifndef __IRQ_H_
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#define __IRQ_H_
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extern void eclic_irq20_handler(void);
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extern void eclic_irq21_handler(void);
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extern void eclic_irq22_handler(void);
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extern void eclic_irq23_handler(void);
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extern void eclic_irq24_handler(void);
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extern void eclic_irq50_handler(void);
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#define CONCAT2(w, x) w##x
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#define CONCAT3(w, x, y) w##x##y
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#define CONCAT4(w, x, y, z) w##x##y##z
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/* Helper macros to build the IRQ handler and priority struct names */
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#define IRQ_HANDLER(irqname) CONCAT3(eclic_irq, irqname, _handler)
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/*
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* Macro to connect the interrupt handler "routine" to the irq number "irq" and
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* ensure it is enabled in the interrupt controller with the right priority.
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*/
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#define DECLARE_IRQ(irq, routine) DECLARE_IRQ_(irq, routine)
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#define DECLARE_IRQ_(irq, routine) \
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void IRQ_HANDLER(irq)(void) \
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{ \
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routine(); \
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}
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/*IRQ_NUM define list*/
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#define IRQ_NUM_MAX 127
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/*You can add other interrupts num here 0~127*/
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/* use for ir */
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#define IRQ_NUM_IRIN 4
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/* APCore GIC_OUTx */
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#define IRQ_NUM_OUT_3 (28 + 13 + 3)
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#define IRQ_NUM_OUT_2 (28 + 12 + 3)
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#define IRQ_NUM_OUT_1 (28 + 11 + 3)
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#define IRQ_NUM_OUT_0 (28 + 10 + 3)
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/*wol*/
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#define IRQ_ETH_PMT_NUM 70
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/* SOC AO Domain timerA~timerC */
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#define IRQ_NUM_AO_TIMERA 12
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#define IRQ_NUM_AO_TIMERB 13
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#define IRQ_NUM_AO_TIMERC 0
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#define IRQ_NUM_TIMERD 47
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#define IRQ_NUM_TIMER IRQ_NUM_AO_TIMERA
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#define IRQ_TIMER_PROI 8
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#endif
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