80 lines
1.7 KiB
C
80 lines
1.7 KiB
C
/*
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* Copyright (c) 2021-2022 Amlogic, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: MIT
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*/
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#ifndef __IRQ_H_
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#define __IRQ_H_
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extern void eclic_irq20_handler(void);
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extern void eclic_irq21_handler(void);
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extern void eclic_irq22_handler(void);
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extern void eclic_irq23_handler(void);
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extern void eclic_irq24_handler(void);
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extern void eclic_irq50_handler(void);
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#define CONCAT_STAGE_1(w, x, y, z) w##x##y##z
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#define CONCAT2(w, x) w##x
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#define CONCAT3(w, x, y) w##x##y
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#define CONCAT4(w, x, y, z) CONCAT_STAGE_1(w, x, y, z)
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/* Helper macros to build the IRQ handler and priority struct names */
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#define IRQ_HANDLER(irqname) CONCAT3(eclic_irq, irqname, _handler)
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#define DECLARE_IRQ(irq, routine)
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/* IRQ_NUM define list */
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#define IRQ_NUM_MAX 107
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/* ee timerA~timerJ */
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#define IRQ_NUM_TIMERA 44
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#define IRQ_NUM_TIMERB 45
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#define IRQ_NUM_TIMERC 46
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#define IRQ_NUM_TIMERD 47
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#define IRQ_NUM_TIMERG 48
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#define IRQ_NUM_TIMERH 49
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#define IRQ_NUM_TIMERI 50
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#define IRQ_NUM_TIMERJ 51
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#define IRQ_NUM_TIMER IRQ_NUM_TIMERJ
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#define IRQ_TIMER_PROI 8
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/* ao rtc irq20 rtc */
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#define IRQ_NUM_RTC 20
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/* ao rtc irq23 cecb */
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#define IRQ_NUM_CECB 23
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/* ao rtc irq29 ir_rx1 */
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#define IRQ_NUM_IRIN 29
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/* ao rtc irq33 uart_c */
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#define IRQ_NUM_AO_UART_C 33
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/* ao rtc irq39 ao_watchdog */
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#define IRQ_WATCHDOG 39
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/* eth mac_a */
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#define IRQ_ETH_MAC_A 78
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/* eth mac_b */
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#define IRQ_ETH_MAC_B 107
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/* eth mac */
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#define IRQ_ETH_MAC IRQ_ETH_MAC_A
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/* ee wol */
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#define IRQ_ETH_PMT_NUM 79
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/* ee mbox to ao */
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#define IRQ_NUM_MBOX 82
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/* ee irq sel to ao */
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/* ee adc irq 181 sel to ao irq 85 */
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#define IRQ_NUM_SEL2AO_AUX_ADC 85
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/* ee adc irq 182 sel to ao irq 86 */
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#define IRQ_NUM_SEL2AO_AUX_ADC_PD_OUT 86
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#endif
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