203 lines
6.4 KiB
C
203 lines
6.4 KiB
C
/*
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* Copyright (c) 2021-2022 Amlogic, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: MIT
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*/
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/*
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* platform related header file
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*/
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#ifndef _MESON_A9_GPIO_H_
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#define _MESON_A9_GPIO_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define GPIO_NUM_MAX 132 /* actual numbers of pins */
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#define BANK_NUM_MAX 13 /* numbers of gpio bank */
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#define IRQ_REG_NUM 8 /* numbers of irq relative reg */
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#define GPIO_INVALID 0xffff
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#define GPIO_AO_IRQ_BASE PADCTRL_GPIOAO_IRQ_CTRL0
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#define GPIO_AO_EXT_IRQ_NUM 13 /* numbers of irq(ao) relative reg */
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/* GPIO_B */
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#define GPIOB_NUM_BASE (0 << 5)
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#define GPIOB_0 (GPIOB_NUM_BASE + 0)
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#define GPIOB_1 (GPIOB_NUM_BASE + 1)
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#define GPIOB_2 (GPIOB_NUM_BASE + 2)
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#define GPIOB_3 (GPIOB_NUM_BASE + 3)
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#define GPIOB_4 (GPIOB_NUM_BASE + 4)
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#define GPIOB_5 (GPIOB_NUM_BASE + 5)
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#define GPIOB_6 (GPIOB_NUM_BASE + 6)
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#define GPIOB_7 (GPIOB_NUM_BASE + 7)
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#define GPIOB_8 (GPIOB_NUM_BASE + 8)
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#define GPIOB_9 (GPIOB_NUM_BASE + 9)
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#define GPIOB_10 (GPIOB_NUM_BASE + 10)
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#define GPIOB_11 (GPIOB_NUM_BASE + 11)
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#define GPIOB_12 (GPIOB_NUM_BASE + 12)
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#define GPIOB_13 (GPIOB_NUM_BASE + 13)
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/* GPIO_X */
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#define GPIOX_NUM_BASE (1 << 5)
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#define GPIOX_0 (GPIOX_NUM_BASE + 0)
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#define GPIOX_1 (GPIOX_NUM_BASE + 1)
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#define GPIOX_2 (GPIOX_NUM_BASE + 2)
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#define GPIOX_3 (GPIOX_NUM_BASE + 3)
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#define GPIOX_4 (GPIOX_NUM_BASE + 4)
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#define GPIOX_5 (GPIOX_NUM_BASE + 5)
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#define GPIOX_6 (GPIOX_NUM_BASE + 6)
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#define GPIOX_7 (GPIOX_NUM_BASE + 7)
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#define GPIOX_8 (GPIOX_NUM_BASE + 8)
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#define GPIOX_9 (GPIOX_NUM_BASE + 9)
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#define GPIOX_10 (GPIOX_NUM_BASE + 10)
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#define GPIOX_11 (GPIOX_NUM_BASE + 11)
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#define GPIOX_12 (GPIOX_NUM_BASE + 12)
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#define GPIOX_13 (GPIOX_NUM_BASE + 13)
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#define GPIOX_14 (GPIOX_NUM_BASE + 14)
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#define GPIOX_15 (GPIOX_NUM_BASE + 15)
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#define GPIOX_16 (GPIOX_NUM_BASE + 16)
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#define GPIOX_17 (GPIOX_NUM_BASE + 17)
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/* GPIO_A */
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#define GPIOA_NUM_BASE (2 << 5)
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#define GPIOA_0 (GPIOA_NUM_BASE + 0)
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#define GPIOA_1 (GPIOA_NUM_BASE + 1)
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#define GPIOA_2 (GPIOA_NUM_BASE + 2)
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#define GPIOA_3 (GPIOA_NUM_BASE + 3)
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#define GPIOA_4 (GPIOA_NUM_BASE + 4)
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#define GPIOA_5 (GPIOA_NUM_BASE + 5)
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#define GPIOA_6 (GPIOA_NUM_BASE + 6)
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#define GPIOA_7 (GPIOA_NUM_BASE + 7)
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#define GPIOA_8 (GPIOA_NUM_BASE + 8)
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#define GPIOA_9 (GPIOA_NUM_BASE + 9)
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#define GPIOA_10 (GPIOA_NUM_BASE + 10)
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#define GPIOA_11 (GPIOA_NUM_BASE + 11)
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#define GPIOA_12 (GPIOA_NUM_BASE + 12)
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#define GPIOA_13 (GPIOA_NUM_BASE + 13)
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#define GPIOA_14 (GPIOA_NUM_BASE + 14)
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#define GPIOA_15 (GPIOA_NUM_BASE + 15)
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#define GPIOA_16 (GPIOA_NUM_BASE + 16)
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#define GPIOA_17 (GPIOA_NUM_BASE + 17)
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#define GPIOA_18 (GPIOA_NUM_BASE + 18)
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#define GPIOA_19 (GPIOA_NUM_BASE + 19)
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/* GPIOZ */
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#define GPIOZ_NUM_BASE (3 << 5)
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#define GPIOZ_0 (GPIOZ_NUM_BASE + 0)
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#define GPIOZ_1 (GPIOZ_NUM_BASE + 1)
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#define GPIOZ_2 (GPIOZ_NUM_BASE + 2)
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#define GPIOZ_3 (GPIOZ_NUM_BASE + 3)
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#define GPIOZ_4 (GPIOZ_NUM_BASE + 4)
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#define GPIOZ_5 (GPIOZ_NUM_BASE + 5)
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#define GPIOZ_6 (GPIOZ_NUM_BASE + 6)
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#define GPIOZ_7 (GPIOZ_NUM_BASE + 7)
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#define GPIOZ_8 (GPIOZ_NUM_BASE + 8)
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#define GPIOZ_9 (GPIOZ_NUM_BASE + 9)
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#define GPIOZ_10 (GPIOZ_NUM_BASE + 10)
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#define GPIOZ_11 (GPIOZ_NUM_BASE + 11)
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#define GPIOZ_12 (GPIOZ_NUM_BASE + 12)
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#define GPIOZ_13 (GPIOZ_NUM_BASE + 13)
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#define GPIOZ_14 (GPIOZ_NUM_BASE + 14)
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#define GPIOZ_15 (GPIOZ_NUM_BASE + 15)
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/* GPIO_H */
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#define GPIOH_NUM_BASE (4 << 5)
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#define GPIOH_0 (GPIOH_NUM_BASE + 0)
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#define GPIOH_1 (GPIOH_NUM_BASE + 1)
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#define GPIOH_2 (GPIOH_NUM_BASE + 2)
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#define GPIOH_3 (GPIOH_NUM_BASE + 3)
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#define GPIOH_4 (GPIOH_NUM_BASE + 4)
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#define GPIOH_5 (GPIOH_NUM_BASE + 5)
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#define GPIOH_6 (GPIOH_NUM_BASE + 6)
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#define GPIOH_7 (GPIOH_NUM_BASE + 7)
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/* GPIOY */
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#define GPIOY_NUM_BASE (5 << 5)
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#define GPIOY_0 (GPIOY_NUM_BASE + 0)
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#define GPIOY_1 (GPIOY_NUM_BASE + 1)
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#define GPIOY_2 (GPIOY_NUM_BASE + 2)
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#define GPIOY_3 (GPIOY_NUM_BASE + 3)
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#define GPIOY_4 (GPIOY_NUM_BASE + 4)
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#define GPIOY_5 (GPIOY_NUM_BASE + 5)
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#define GPIOY_6 (GPIOY_NUM_BASE + 6)
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#define GPIOY_7 (GPIOY_NUM_BASE + 7)
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/* GPIOY1 */
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#define GPIOY1_NUM_BASE (6 << 5)
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#define GPIOY_8 (GPIOY1_NUM_BASE + 0)
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#define GPIOY_9 (GPIOY1_NUM_BASE + 1)
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/* GPIOM */
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#define GPIOM_NUM_BASE (7 << 5)
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#define GPIOM_0 (GPIOM_NUM_BASE + 0)
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#define GPIOM_1 (GPIOM_NUM_BASE + 1)
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#define GPIOM_2 (GPIOM_NUM_BASE + 2)
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#define GPIOM_3 (GPIOM_NUM_BASE + 3)
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#define GPIOM_4 (GPIOM_NUM_BASE + 4)
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#define GPIOM_5 (GPIOM_NUM_BASE + 5)
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#define GPIOM_6 (GPIOM_NUM_BASE + 6)
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#define GPIOM_7 (GPIOM_NUM_BASE + 7)
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/* GPIOD (AO DOMAIN) */
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#define GPIOD_NUM_BASE (8 << 5)
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#define GPIOD_0 (GPIOD_NUM_BASE + 0)
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#define GPIOD_1 (GPIOD_NUM_BASE + 1)
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#define GPIOD_2 (GPIOD_NUM_BASE + 2)
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#define GPIOD_3 (GPIOD_NUM_BASE + 3)
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#define GPIOD_4 (GPIOD_NUM_BASE + 4)
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#define GPIOD_5 (GPIOD_NUM_BASE + 5)
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#define GPIOD_6 (GPIOD_NUM_BASE + 6)
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#define GPIOD_7 (GPIOD_NUM_BASE + 7)
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#define GPIOD_8 (GPIOD_NUM_BASE + 8)
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#define GPIOD_9 (GPIOD_NUM_BASE + 9)
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#define GPIOD_10 (GPIOD_NUM_BASE + 10)
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#define GPIOD_11 (GPIOD_NUM_BASE + 11)
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#define GPIOD_12 (GPIOD_NUM_BASE + 12)
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#define GPIOD_13 (GPIOD_NUM_BASE + 13)
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#define GPIOD_14 (GPIOD_NUM_BASE + 14)
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#define GPIOD_15 (GPIOD_NUM_BASE + 15)
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#define GPIOD_16 (GPIOD_NUM_BASE + 16)
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/* GPIOD1 (AO DOMAIN) */
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#define GPIOD1_NUM_BASE (9 << 5)
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#define GPIOD_17 (GPIOD1_NUM_BASE + 0)
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/* GPIO_AO (AO DOMAIN) */
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#define GPIOAO_NUM_BASE (10 << 5)
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#define GPIOAO_0 (GPIOAO_NUM_BASE + 0)
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#define GPIOAO_1 (GPIOAO_NUM_BASE + 1)
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#define GPIOAO_2 (GPIOAO_NUM_BASE + 2)
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#define GPIOAO_3 (GPIOAO_NUM_BASE + 3)
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#define GPIOAO_4 (GPIOAO_NUM_BASE + 4)
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#define GPIOAO_5 (GPIOAO_NUM_BASE + 5)
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#define GPIOAO_6 (GPIOAO_NUM_BASE + 6)
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#define GPIOAO_7 (GPIOAO_NUM_BASE + 7)
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#define GPIOAO_8 (GPIOAO_NUM_BASE + 8)
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#define GPIOAO_9 (GPIOAO_NUM_BASE + 9)
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#define GPIOAO_10 (GPIOAO_NUM_BASE + 10)
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#define GPIOAO_11 (GPIOAO_NUM_BASE + 11)
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#define GPIOAO_12 (GPIOAO_NUM_BASE + 12)
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/* GPIO_C (AO DOMAIN) */
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#define GPIOC_NUM_BASE (11 << 5)
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#define GPIOC_0 (GPIOC_NUM_BASE + 0)
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#define GPIOC_1 (GPIOC_NUM_BASE + 1)
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#define GPIOC_2 (GPIOC_NUM_BASE + 2)
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#define GPIOC_3 (GPIOC_NUM_BASE + 3)
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#define GPIOC_4 (GPIOC_NUM_BASE + 4)
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#define GPIOC_5 (GPIOC_NUM_BASE + 5)
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#define GPIOC_6 (GPIOC_NUM_BASE + 6)
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/* TEST_N (AO DOMAIN) */
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#define GPIO_TEST_NUM_BASE (12 << 5)
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#define GPIO_TEST_N (GPIO_TEST_NUM_BASE + 0)
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#ifdef __cplusplus
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}
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#endif
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#endif
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