102 lines
2.4 KiB
C
102 lines
2.4 KiB
C
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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/*
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* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
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*/
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#ifndef _PWM_MESON_TEE_H
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#define _PWM_MESON_TEE_H
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#include <linux/bitfield.h>
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#include <linux/bits.h>
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/math64.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/pwm.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/amlogic/arm-smccc.h>
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#include <linux/amlogic/secure_pwm_i2c.h>
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#define PWM_MESON_TEE_DRV_CMP "amlogic,meson-pwm-tee"
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enum sec_pwm {
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SECID_PWM_ENABLE_MAIN = 0,
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SECID_PWM_ENABLE_SUB,
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SECID_PWM_DISABLE_MAIN,
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SECID_PWM_DISABLE_SUB,
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SECID_PWM_CONSTANT_EN,
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SECID_PWM_CONSTANT_DIS,
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SECID_PWM_TIMES_MAIN,
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SECID_PWM_TIMES_SUB,
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};
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#define REG_PWM 0x0
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#define PWM_LOW_MASK GENMASK(15, 0)
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#define PWM_HIGH_MASK GENMASK(31, 16)
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#define PWM_MISC_REG 0x8
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#define MISC_EN BIT(0)
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#define MISC_EN_SUB BIT(25)
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#define MISC_CONSTANT BIT(28)
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#define CHANNEL_MAIN 0
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#define REG_TIME 0x10
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#define TIME_MASK_MAIN 0xff000000
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#define TIME_MASK_SUB 0x00ff0000
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#define TIME_MAIN 24
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#define TIME_SUB 16
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#define REG_PWM_SUB 0x14
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#define DOUBLE_CHAN_COMPAT
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#ifdef DOUBLE_CHAN_COMPAT
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#define MESON_NUM_PWMS_TEE 2
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#define CHANNEL_SUB 1
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#else
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#define MESON_NUM_PWMS_TEE 1
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#endif
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struct meson_pwm_tee_channel {
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unsigned long rate;
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unsigned int hi;
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unsigned int lo;
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struct clk *clk;
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u8 pre_div;
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u8 clk_div;
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};
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/*pwm register att*/
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struct meson_pwm_variant_n {
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unsigned int times;
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unsigned int constant;
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unsigned int blink_enable;
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unsigned int blink_times;
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};
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struct meson_pwm_tee {
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struct pwm_chip *chip;
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struct meson_pwm_tee_channel channels[MESON_NUM_PWMS_TEE];
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struct meson_pwm_variant_n variant;
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void __iomem *base;
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u32 tee_id;
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u32 smc_id;
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/*
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* Protects register (write) access to the PWM_MISC_REG register
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* that is shared between the two PWMs.
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*/
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spinlock_t lock;
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u32 no_change_clk;
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#ifdef CONFIG_HIBERNATION
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#define PWM_TEE_REG_NUMS 8
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u32 regs_restore[PWM_TEE_REG_NUMS];
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#endif
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};
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int meson_pwm_sysfs_init(struct device *dev, bool tee_pwm);
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struct meson_pwm_tee *to_meson_pwm_tee(struct pwm_chip *chip);
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int pwm_set_times_tee(struct meson_pwm_tee *meson,
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unsigned int index, unsigned int value);
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#endif /* _PWM_MESON_TEE_H_ */
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