57 lines
1.8 KiB
C
57 lines
1.8 KiB
C
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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/*
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* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
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*/
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#define PWRC_A9_DSPA_ID 0
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#define PWRC_A9_U3HSG_U3_ID 1
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#define PWRC_A9_DP_ID 2
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#define PWRC_A9_DOS_HCODEC_ID 3
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#define PWRC_A9_TAHOE_ID 4
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#define PWRC_A9_DOS_HEVC_ID 5
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#define PWRC_A9_U2H_ID 6
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#define PWRC_A9_U3DRD_B_ID 7
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#define PWRC_A9_VPU_HDMI_ID 8
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#define PWRC_A9_U2DRD_ID 9
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#define PWRC_A9_U3DRD_A_ID 10
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#define PWRC_A9_SD_EMMC_C_ID 11
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#define PWRC_A9_GE2D_ID 12
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#define PWRC_A9_AMFC_ID 13
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#define PWRC_A9_EDPTX_ID 14
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#define PWRC_A9_OPP_ID 15
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#define PWRC_A9_VICP_ID 16
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#define PWRC_A9_SD_EMMC_A_ID 17
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#define PWRC_A9_SD_EMMC_B_ID 18
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#define PWRC_A9_ETH_ID 19
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#define PWRC_A9_PCIE_A_ID 20
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#define PWRC_A9_PCIE_B_ID 21
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#define PWRC_A9_NNA_4T_ID 22
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#define PWRC_A9_HDMIRX_ID 23
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#define PWRC_A9_CVE_ID 24
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#define PWRC_A9_ISP_ID 25
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#define PWRC_A9_ETH_1G_ID 26
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#define PWRC_A9_U3HSG_HSG_ID 27
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#define PWRC_A9_U3DPPHY_U3_ID 28
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#define PWRC_A9_U3DPPHY_DP_ID 29
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#define PWRC_A9_PCIE3PHY_ID 30
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#define PWRC_A9_U3HSG_PCIE2_ID 31
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#define PWRC_A9_MALI_TOP_ID 32
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#define PWRC_A9_AO_SED_ID 33
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#define PWRC_A9_AO_IR_ID 34
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#define PWRC_A9_AO_UART_B_ID 35
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#define PWRC_A9_AO_UART_C_ID 36
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#define PWRC_A9_AO_UART_D_ID 37
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#define PWRC_A9_AO_SPISG_ID 38
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#define PWRC_A9_AO_UART_E_ID 39
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#define PWRC_A9_AO_CEC_ID 40
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#define PWRC_A9_EE_SRAMA_ID 41
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#define PWRC_A9_AUDIO_ID 42
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#define PWRC_A9_DMC0_ID 43
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#define PWRC_A9_GIC_ID 44
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#define PWRC_A9_DDRPHY_ID 45
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#define PWRC_A9_AUCPU_ID 46
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#define PWRC_A9_DSI0_ID 47
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#define PWRC_A9_DSI1_ID 48
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#define PWRC_A9_CAN0_ID 49
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#define PWRC_A9_CAN1_ID 50
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