49 lines
1.2 KiB
C
49 lines
1.2 KiB
C
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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/*
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* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
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*/
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#ifndef _AMLOGIC_PCIE_PHY_H_
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#define _AMLOGIC_PCIE_PHY_H_
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struct amlogic_pcie_phy;
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struct amlogic_pcie_phy_data {
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int (*parse_dt)(struct amlogic_pcie_phy *pcie_phy);
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int (*phy_reset)(struct amlogic_pcie_phy *pcie_phy);
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int (*phy_exit)(struct amlogic_pcie_phy *pcie_phy);
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int (*phy_init)(struct amlogic_pcie_phy *pcie_phy);
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int (*phy_power_on)(struct amlogic_pcie_phy *pcie_phy);
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int (*phy_power_off)(struct amlogic_pcie_phy *pcie_phy);
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};
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struct amlogic_pcie_phy {
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struct device *dev;
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struct phy *phy;
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struct amlogic_pcie_phy_data *data;
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struct regmap *regmap;
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struct fwnode_handle *fwnode;
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void __iomem *reset_base;
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void __iomem *efuse_base;
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struct reset_control *phy_apb_rst;
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struct reset_control_bulk_data *resets;
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u32 reset_number;
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struct clk *pcie_phy_clk;
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struct clk *pcie_apb_bus_clk;
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u32 pll_setting_number;
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u32 num_lanes;
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u32 port_num;
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};
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struct pcie_reset_seq {
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const char *name;
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unsigned long delay_us; /* deassert */
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};
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/* Common probe function */
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int amlogic_pcie_phy_probe(struct platform_device *pdev);
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#endif /* _AMLOGIC_PCIE_PHY_H_ */
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