40 lines
1.2 KiB
C
40 lines
1.2 KiB
C
/*
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* Copyright (c) 202X Amlogic, Inc. All rights reserved.
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*
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* This source code is subject to the terms and conditions defined in the
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* file 'LICENSE' which is part of this source code package.
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*
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* Description:
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*/
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#ifndef WIFI_INTF_ADDR_H
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#define WIFI_INTF_ADDR_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define WIFI_INTF (0xd000)
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#define RG_INTF_CTRL_CLK (WIFI_INTF + 0xb0)
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#define RG_INTF_CPU_CLK (WIFI_INTF + 0x090)
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#define RG_INTF_APB_CLK (WIFI_INTF + 0x094)
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#define RG_INTF_MAC_CLK (WIFI_INTF + 0x098)
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#define RG_INTF_DAC_CLK (WIFI_INTF + 0x0a0)
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#define RG_INTF_ADC_CLK (WIFI_INTF + 0x0a4)
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#define RG_INTF_VIT_CLK (WIFI_INTF + 0x0ac)
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#define RG_INTF_11BRX_CLK (WIFI_INTF + 0x0bc)
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#define RG_INTF_320M_CLK (WIFI_INTF + 0x100)
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#define RG_INTF_240M_CLK (WIFI_INTF + 0x104)
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#define RG_INTF_BTCPU_CLK (WIFI_INTF + 0x108)
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#define RG_INTF_BTMAC_CLK (WIFI_INTF + 0x10c)
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#define RG_INTF_LDPC_CLK (WIFI_INTF + 0x118)
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#define RG_INTF_PIN_MUX_REG1 (WIFI_INTF + 0x004)
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#define RG_INTF_SHARE_64K_CAP (WIFI_INTF + 0x0e4)
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#define RG_INTF_PHY_CLK (WIFI_INTF + 0x0a8)
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#define RG_INTF_RTC_CLK_CTRL (WIFI_INTF + 0xc0)
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#define RG_INTF_MAC_TIMER_CTRL1 (WIFI_INTF + 0xd0)
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#endif /* WIFI_INTF_ADDR_H */
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