/*
 * Copyright (c) 2021-2022 Amlogic, Inc. All rights reserved.
 *
 * SPDX-License-Identifier: MIT
 */

#ifndef RISCV_CACHE_H
#define RISCV_CACHE_H

#include "riscv_encoding.h"

#define __FENCE(p, s) __asm volatile ("fence " #p "," #s : : : "memory")
#define __RWMB()      __FENCE(iorw, iorw)

/*!< Unlock and invalidate D-Cache line specified by CSR CCM_XBEGINADDR */
/*!< Flush the specific D-Cache line specified by CSR CCM_XBEGINADDR */
/*!< Unlock, flush and invalidate the specific D-Cache line specified by CSR CCM_XBEGINADDR */
/*!< Lock the specific D-Cache line specified by CSR CCM_XBEGINADDR */
/*!< Unlock the specific D-Cache line specified by CSR CCM_XBEGINADDR */
/*!< Unlock and flush and invalidate all the valid and dirty D-Cache lines */
/*!< Flush all the valid and dirty D-Cache lines */
/*!< Unlock and invalidate all the D-Cache lines */
/*!< Unlock and invalidate I-Cache line specified by CSR CCM_XBEGINADDR */
/*!< Lock the specific I-Cache line specified by CSR CCM_XBEGINADDR */
/*!< Unlock the specific I-Cache line specified by CSR CCM_XBEGINADDR */
/*!< Unlock and invalidate all the I-Cache lines */
typedef enum CCM_CMD {
	CCM_DC_INVAL = 0x0,
	CCM_DC_WB = 0x1,
	CCM_DC_WBINVAL = 0x2,
	CCM_DC_LOCK = 0x3,
	CCM_DC_UNLOCK = 0x4,
	CCM_DC_WBINVAL_ALL = 0x6,
	CCM_DC_WB_ALL = 0x7,
	CCM_DC_INVAL_ALL = 0x17,
	CCM_IC_INVAL = 0x8,
	CCM_IC_LOCK = 0xb,
	CCM_IC_UNLOCK = 0xc,
	CCM_IC_INVAL_ALL = 0xd
} CCM_CMD_Type;

static inline void vFlushPipeCCM(void)
{
	write_csr(ccm_fpipe, 0x1);
}


static inline void vMFlushDCacheLine(unsigned long addr)
{
	write_csr(ccm_mbeginaddr, addr);
	write_csr(ccm_mcommand, CCM_DC_WB);
	vFlushPipeCCM();
	__RWMB();
}

static inline void vMInvalICacheLine(unsigned long addr)
{
	write_csr(ccm_mbeginaddr, addr);
	write_csr(ccm_mcommand, CCM_IC_INVAL);
	vFlushPipeCCM();
	__RWMB();
}

#endif