/*
 * Copyright (c) 2021-2026 Amlogic, Inc. All rights reserved.
 *
 * SPDX-License-Identifier: MIT
 */

#ifndef __PDD_DATA_H_
#define __PDD_DATA_H_

#include <register.h>
#include "irq.h"

#define PDD_CLK_BASE		CLKCTRL_SAR_CLK_CTRL0
#define PDD_REG_BASE		SAR_ADC_REG0

#define PDD_SYS_CLK_EN_BASE	CLKCTRL_SYS_CLK_EN0_REG2
#define PDD_SYS_CLK_EN_BIT	28

#define PDD_IRQ_OUT_REG_OFFS	0x18
#define PDD_IRQ_OUT_BIT_OFFS	26

#define PDD_IRQ_CLR_REG_OFFS	0x18
#define PDD_IRQ_CLR_BIT_OFFS	23

#define PDD_IRQ_EN_REG_OFFS	0x18
#define PDD_IRQ_EN_BIT_OFFS	17

#define PDD_FLT_TICK_REG_OFFS	0x18
#define PDD_FLT_TICK_BIT_OFFS	12

#define PDD_FLT_CNT_REG_OFFS	0x18
#define PDD_FLT_CNT_BIT_OFFS	14

#define PDD_DET_TRIM_REG_OFFS	0x14
#define PDD_DET_TRIM_BIT_OFFS	26

#define PDD_DET_EN_REG_OFFS	0x14
#define PDD_DET_EN_BIT_OFFS	22

#define PDD_DET_CTRL_REG_OFFS	0x14
#define PDD_DET_CTRL_BIT_OFFS	24

#define PDD_INTERRUPT_NUM IRQ_NUM_SEL2AO_AUX_ADC_PD_OUT

#endif /* __PDD_DATA_H_ */