/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ /* * Copyright (c) 2021 Amlogic, Inc. All rights reserved. */ #ifndef _AML_PROC_H_ #define _AML_PROC_H_ #define OUTPUT_NUM 8 #define ADEC_MAX_CAP 2 #define ADEC_NUM 4 #define AMIXER_NUM 8 #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #define int_compat long long struct input_param { int_compat input_type; int_compat port_number; int_compat input_source; low_latency_mode_type_t low_latency_mode; }; struct latency_param { struct input_param in_param; int_compat output_type; int_compat latency_time; }; struct optic_lg_param { int_compat bar_id; int_compat volume; int_compat mute_on_off; int_compat power_on_off; int_compat checksum; }; struct output_type { int_compat set_type; int_compat codec_type; int_compat channel_num; int_compat sample_rate; int_compat mix_option; }; struct lgse_mode { int_compat mode; int_compat peq; int_compat deq; }; typedef struct Ioctl_update_storage { int_compat adec_open_status_s[ADEC_MAX_CAP]; int_compat adec_connect_port_s[ADEC_MAX_CAP]; int_compat adec_start_status_s[ADEC_MAX_CAP]; int_compat adec_codec_status_s[ADEC_MAX_CAP]; int_compat cur_codec_s[ADEC_MAX_CAP]; int_compat src_codec_s[ADEC_MAX_CAP]; int_compat src_bitrate_s[ADEC_MAX_CAP]; int_compat src_sample_rate_s[ADEC_MAX_CAP]; int_compat src_channel_s[ADEC_MAX_CAP]; int_compat output_codec_s[ADEC_MAX_CAP]; int_compat output_channel_s[ADEC_MAX_CAP]; int_compat adec_dolyb_drc_mode_s[ADEC_MAX_CAP]; int_compat adec_downmix_mode_s[ADEC_MAX_CAP]; int_compat adec_sync_mode_s[ADEC_MAX_CAP]; int_compat adec_trick_mode_s[ADEC_MAX_CAP]; int_compat adec_output_mode_s[ADEC_MAX_CAP]; int_compat adec_gain_array_s[ADEC_NUM]; int_compat adec_mute_array_s[ADEC_NUM]; int_compat adec_delay_array_s[ADEC_NUM]; int_compat adec_default_prl_s[ADEC_NUM]; int_compat adec_ad_onoff_s[ADEC_MAX_CAP]; int_compat open_sndout_s; int_compat connect_sndout_status_s[9]; int_compat spk_output_type_s; int_compat output_gain_array_s[OUTPUT_NUM]; int_compat output_mute_array_s[OUTPUT_NUM + 1]; int_compat output_delay_array_s[OUTPUT_NUM]; struct input_param main_audio_s; int_compat amixer_delay_array_s[AMIXER_NUM]; int_compat optic_light_onoff_s; int_compat optic_output_type_s; int_compat arc_output_type_s; // sndout_arc_mode_ext_type_t int_compat optic_cp_info_s; int_compat arc_cp_info_s; struct optic_lg_param optic_lg_status_s; int_compat arc_onoff_s; struct output_type earc_output_s; int_compat earc_onoff_s; int_compat sound_engine_mode_s; struct lgse_mode lgse_set_mode_s; } Ioctl_update_storage_t; typedef enum ioctl_update_info { ADEC_OPEN_STATUS_E = 0, ADEC_CLOSE_STATUS_E, ADEC_STOP_STATUS_E, ADEC_CONNECT_PORT_E, ADEC_START_STATUS_E, ADEC_CODEC_STATUS_E, CUR_CODEC_E, SRC_CODEC_E, SRC_BITRATE_E, SRC_SAMPLE_RATE_E, SRC_CHANNEL_E, OUTPUT_CODEC_E, OUTPUT_CHANNEL_E, ADEC_PTS_E, ADEC_DOLYB_DRC_MODE_E, ADEC_DOWNMIX_MODE_E, ADEC_SYNC_MODE_E, ADEC_TRICK_MODE_E, ADEC_OUTPUT_MODE_E, ADEC_GAIN_ARRAY_E, ADEC_MUTE_ARRAY_E, ADEC_DELAY_ARRAY_E, ADEC_DEFAULT_PRL_E, ADEC_AD_ONOFF_E, OPEN_SNDOUT_E, CONNECT_SNDOUT_STATUS_E, SPK_OUTPUT_TYPE_E, OUTPUT_GAIN_ARRAY_E, OUTPUT_MUTE_ARRAY_E, OUTPUT_DELAY_ARRAY_E, MAIN_AUDIO_E, AMIXER_DELAY_ARRAY_E, OPTIC_LIGHT_ONOFF_E, OPTIC_OUTPUT_TYPE_E, ARC_OUTPUT_TYPE_E, OPTIC_CP_INFO_E, ARC_CP_INFO_E, OPTIC_LG_STATUS_E, ARC_ONOFF_E, EARC_OUTPUT_E, EARC_ONOFF_E, SOUND_ENGINE_MODE_E, LGSE_SET_MODE_E, } ioctl_update_info_t; int audio_proc_ioctl_update(unsigned int cmd, struct Ioctl_update_storage *proc_info_storage_t); #endif