/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
/*
 * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
 */

#define PDID_CX_CPU_PWR0				0
#define PDID_CX_CPU_CORE0				1
#define PDID_CX_CPU_CORE1				2
#define PDID_CX_SPTOP					5
#define PDID_CX_DSP_A					8
#define PDID_CX_DSP_B					9
#define PDID_CX_UART					10
#define PDID_CX_DMC					11
#define PDID_CX_I2C					12
#define PDID_CX_SDEMMC_B				13
#define PDID_CX_ACODEC					14
#define PDID_CX_AUDIO					15
#define PDID_CX_MKL_OTP					16
#define PDID_CX_DMA					17
#define PDID_CX_SDEMMC_A				18
#define PDID_CX_SRAM_A					19
#define PDID_CX_SRAM_B					20
#define PDID_CX_IR					21
#define PDID_CX_SPICC					22
#define PDID_CX_SPIFC					23
#define PDID_CX_USB					24
#define PDID_CX_NIC					25
#define PDID_CX_PDM					26
#define PDID_CX_RSA					27
#define PDID_CX_MIPI_ISP				28
#define PDID_CX_HCODEC					29
#define PDID_CX_WAVE					30
#define PDID_CX_SDEMMC_C				31
#define PDID_CX_SRAM_C					32
#define PDID_CX_GDC					33
#define PDID_CX_GE2D					34
#define PDID_CX_NNA					35
#define PDID_CX_ETH					36
#define PDID_CX_GIC					37
#define PDID_CX_DDR					38
#define PDID_CX_SPICC_B					39
#define PDID_CX_MAX					40