/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
/*
 * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
 */

#define PDID_A9_DSPA       0
#define PDID_A9_U3HSG_U3   1
#define PDID_A9_DP         2
#define PDID_A9_DOS_HCODEC 3
#define PDID_A9_TAHOE      4
#define PDID_A9_DOS_HEVC   5
#define PDID_A9_U2H        6
#define PDID_A9_U3DRD_B    7
#define PDID_A9_VPU_HDMI   8
#define PDID_A9_U2DRD      9
#define PDID_A9_U3DRD_A    10
#define PDID_A9_SD_EMMC_C  11
#define PDID_A9_GE2D       12
#define PDID_A9_AMFC       13
#define PDID_A9_EDPTX      14
#define PDID_A9_OPP        15
#define PDID_A9_VICP       16
#define PDID_A9_SD_EMMC_A  17
#define PDID_A9_SD_EMMC_B  18
#define PDID_A9_ETH        19
#define PDID_A9_PCIE_A     20
#define PDID_A9_PCIE_B     21
#define PDID_A9_NNA_4T     22
#define PDID_A9_HDMIRX     23
#define PDID_A9_CVE        24
#define PDID_A9_ISP        25
#define PDID_A9_ETH_1G     26
#define PDID_A9_U3HSG_HSG  27
#define PDID_A9_U3DPPHY_U3 28
#define PDID_A9_U3DPPHY_DP 29
#define PDID_A9_PCIE3PHY   30
#define PDID_A9_U3HSG_PCIE2 31
#define PDID_A9_MALI_TOP    32
#define PDID_A9_AO_SED     33
#define PDID_A9_AO_IR      34
#define PDID_A9_AO_UART_B  35
#define PDID_A9_AO_UART_C  36
#define PDID_A9_AO_UART_D  37
#define PDID_A9_AO_SPISG   38
#define PDID_A9_AO_UART_E  39
#define PDID_A9_AO_CEC     40
#define PDID_A9_EE_SRAMA   41
#define PDID_A9_AUDIO      42
#define PDID_A9_DMC0       43
#define PDID_A9_GIC        44
#define PDID_A9_DDRPHY     45
#define PDID_A9_AUCPU      46
#define PDID_A9_DSI0       47
#define PDID_A9_DSI1       48
#define PDID_A9_CAN0       49
#define PDID_A9_CAN1       50