/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
/*
 * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
 */

#ifndef __S6_SCMI_CLK_H
#define __S6_SCMI_CLK_H

/*
 * CLKID index values
 */
#define CLKID_SYS0_PLL_SRC			0
#define CLKID_DDR_PHY				1
#define CLKID_SYS1_PLL_SRC			2
#define CLKID_PCIE_PMA_PLL_SRC			3
#define CLKID_GP0_PLL_SRC			4
#define CLKID_HDMI_EARC_PLL_SRC			5
#define CLKID_GP1_PLL_SRC			6
#define CLKID_USB3_PHY20_PLL_SRC		7
#define CLKID_HIFI0_PLL_SRC			8
#define CLKID_DSI_PLL_SRC			9
#define CLKID_ETH_HIFI1_PLL_SRC			10
#define CLKID_GP2_PLL_SRC			11
#define CLKID_FIXED_PLL_SRC			12
#define CLKID_USB2_PLL_SRC			13
#define CLKID_CSI_PLL_SRC			14
#define CLKID_SYS_CLK				15
#define CLKID_AXI_CLK				16
#define CLKID_CPU_CLK				17
#define CLKID_DSU_CLK				18
#define CLKID_FIXED_PLL				19
#define CLKID_GP1_PLL				20
#define CLKID_GP2_PLL				21
#define CLKID_ACLKM				22

#endif /* __S6_SCMI_CLK_H */