/* SPDX-License-Identifier: GPL-2.0-only */ /* * Code copied from arch/arm64/mm/cache.S. */ #include #include #include SYM_FUNC_START(__pi_dcache_clean_inval_poc) dcache_by_line_op civac, sy, x0, x1, x2, x3 ret SYM_FUNC_END(__pi_dcache_clean_inval_poc) SYM_FUNC_ALIAS(dcache_clean_inval_poc, __pi_dcache_clean_inval_poc) SYM_FUNC_START(__pi_icache_inval_pou) alternative_if ARM64_HAS_CACHE_DIC isb ret alternative_else_nop_endif invalidate_icache_by_line x0, x1, x2, x3 ret SYM_FUNC_END(__pi_icache_inval_pou) SYM_FUNC_ALIAS(icache_inval_pou, __pi_icache_inval_pou) .macro caches_clean_inval_pou_macro, fixup alternative_if ARM64_HAS_CACHE_IDC dsb ishst b .Ldc_skip_\@ alternative_else_nop_endif mov x2, x0 mov x3, x1 dcache_by_line_op cvau, ish, x2, x3, x4, x5, \fixup .Ldc_skip_\@: alternative_if ARM64_HAS_CACHE_DIC isb b .Lic_skip_\@ alternative_else_nop_endif invalidate_icache_by_line x0, x1, x2, x3, \fixup .Lic_skip_\@: .endm SYM_FUNC_START(caches_clean_inval_pou) caches_clean_inval_pou_macro ret SYM_FUNC_END(caches_clean_inval_pou)